23 static struct bcm2836_arm_irqchip_intc intc  __read_mostly;
29 	void __iomem *reg = intc.base + reg_offset + 4 * cpu;  in bcm2836_arm_irqchip_mask_per_cpu_irq()
38 	void __iomem *reg = intc.base + reg_offset + 4 * cpu;  in bcm2836_arm_irqchip_unmask_per_cpu_irq()
65 	writel(1 << smp_processor_id(), intc.base + LOCAL_PM_ROUTING_CLR);  in bcm2836_arm_irqchip_mask_pmu_irq()
70 	writel(1 << smp_processor_id(), intc.base + LOCAL_PM_ROUTING_SET);  in bcm2836_arm_irqchip_unmask_pmu_irq()
142 	stat = readl_relaxed(intc.base + LOCAL_IRQ_PENDING0 + 4 * cpu);  in bcm2836_arm_irqchip_handle_irq()
146 		generic_handle_domain_irq(intc.domain, hwirq);  in bcm2836_arm_irqchip_handle_irq()
161 	mbox_val = readl_relaxed(intc.base + LOCAL_MAILBOX0_CLR0 + 16 * cpu);  in bcm2836_arm_irqchip_handle_ipi()
175 		       intc.base + LOCAL_MAILBOX0_CLR0 + 16 * cpu);  in bcm2836_arm_irqchip_ipi_ack()
182 	void __iomem *mailbox0_base = intc.base + LOCAL_MAILBOX0_SET0;  in bcm2836_arm_irqchip_ipi_send_mask()
250 		.fwnode		= intc.domain->fwnode,  in bcm2836_arm_irqchip_smp_init()
262 	ipi_domain = irq_domain_create_linear(intc.domain->fwnode,  in bcm2836_arm_irqchip_smp_init()
309 	writel(0, intc.base + LOCAL_CONTROL);  in bcm2835_init_local_timer_frequency()
315 	writel(0x80000000, intc.base + LOCAL_PRESCALER);  in bcm2835_init_local_timer_frequency()
321 	intc.base = of_iomap(node, 0);  in bcm2836_arm_irqchip_l1_intc_of_init()
322 	if (!intc.base) {  in bcm2836_arm_irqchip_l1_intc_of_init()
328 	intc.domain = irq_domain_add_linear(node, LAST_IRQ + 1,  in bcm2836_arm_irqchip_l1_intc_of_init()
331 	if (!intc.domain)  in bcm2836_arm_irqchip_l1_intc_of_init()
334 	irq_domain_update_bus_token(intc.domain, DOMAIN_BUS_WIRED);  in bcm2836_arm_irqchip_l1_intc_of_init()