Lines Matching refs:CNTR_NORMAL

1224 	  0, CNTR_NORMAL, port_access_u64_csr)
4098 CNTR_NORMAL),
4100 CNTR_NORMAL),
4103 CNTR_NORMAL),
4105 CNTR_NORMAL),
4107 RCV_TID_FLOW_SEQ_MISMATCH_CNT, CNTR_NORMAL),
4109 CCE_PCIE_POSTED_CRDT_STALL_CNT, CNTR_NORMAL),
4111 CNTR_NORMAL),
4113 CNTR_NORMAL),
4115 CNTR_NORMAL),
4117 CNTR_NORMAL),
4119 CNTR_NORMAL),
4121 CNTR_NORMAL),
4123 CCE_RCV_URGENT_INT_CNT, CNTR_NORMAL),
4125 CCE_SEND_CREDIT_INT_CNT, CNTR_NORMAL),
4234 [C_SW_CPU_INTR] = CNTR_ELEM("Intr", 0, 0, CNTR_NORMAL,
4236 [C_SW_CPU_RCV_LIM] = CNTR_ELEM("RcvLimit", 0, 0, CNTR_NORMAL,
4238 [C_SW_CTX0_SEQ_DROP] = CNTR_ELEM("SeqDrop0", 0, 0, CNTR_NORMAL,
4240 [C_SW_VTX_WAIT] = CNTR_ELEM("vTxWait", 0, 0, CNTR_NORMAL,
4242 [C_SW_PIO_WAIT] = CNTR_ELEM("PioWait", 0, 0, CNTR_NORMAL,
4244 [C_SW_PIO_DRAIN] = CNTR_ELEM("PioDrain", 0, 0, CNTR_NORMAL,
4246 [C_SW_KMEM_WAIT] = CNTR_ELEM("KmemWait", 0, 0, CNTR_NORMAL,
4248 [C_SW_TID_WAIT] = CNTR_ELEM("TidWait", 0, 0, CNTR_NORMAL,
4250 [C_SW_SEND_SCHED] = CNTR_ELEM("SendSched", 0, 0, CNTR_NORMAL,
4254 CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
4257 CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
4260 CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
4263 CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
4266 CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
4270 CNTR_NORMAL,
4273 CNTR_NORMAL,
4276 CNTR_NORMAL,
4279 CNTR_NORMAL,
4282 CNTR_NORMAL,
4285 0, CNTR_NORMAL,
4288 CNTR_NORMAL,
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4294 CNTR_NORMAL,
4297 CNTR_NORMAL,
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4322 CNTR_NORMAL,
4325 CNTR_NORMAL,
4328 0, CNTR_NORMAL,
4331 0, CNTR_NORMAL,
4334 CNTR_NORMAL,
4337 CNTR_NORMAL,
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4346 CNTR_NORMAL,
4349 CNTR_NORMAL,
4352 0, CNTR_NORMAL,
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4402 CNTR_NORMAL,
4407 CNTR_NORMAL,
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4414 0, CNTR_NORMAL,
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4420 0, CNTR_NORMAL,
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4429 0, CNTR_NORMAL,
4432 CNTR_NORMAL,
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4497 CNTR_NORMAL,
4500 CNTR_NORMAL,
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4506 CNTR_NORMAL,
4509 0, CNTR_NORMAL,
4512 0, CNTR_NORMAL,
4515 CNTR_NORMAL,
4518 CNTR_NORMAL,
4521 CNTR_NORMAL,
4525 CNTR_NORMAL,
4528 0, CNTR_NORMAL,
4531 0, CNTR_NORMAL,
4534 CNTR_NORMAL,
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4540 CNTR_NORMAL,
4543 CNTR_NORMAL,
4546 CNTR_NORMAL,
4549 CNTR_NORMAL,
4553 CNTR_NORMAL,
4557 CNTR_NORMAL,
4560 0, CNTR_NORMAL,
4563 0, CNTR_NORMAL,
4566 0, 0, CNTR_NORMAL,
4569 0, CNTR_NORMAL,
4573 CNTR_NORMAL,
4576 0, CNTR_NORMAL,
4579 0, CNTR_NORMAL,
4582 CNTR_NORMAL,
4585 CNTR_NORMAL,
4589 CNTR_NORMAL,
4592 CNTR_NORMAL,
4595 CNTR_NORMAL,
4598 CNTR_NORMAL,
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4604 CNTR_NORMAL,
4607 CNTR_NORMAL,
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4631 CNTR_NORMAL,
4634 CNTR_NORMAL,
4637 CNTR_NORMAL,
4641 CNTR_NORMAL,
4644 CNTR_NORMAL,
4647 0, 0, CNTR_NORMAL,
4650 0, CNTR_NORMAL,
4653 CNTR_NORMAL,
4656 CNTR_NORMAL,
4659 CNTR_NORMAL,
4662 CNTR_NORMAL,
4665 CNTR_NORMAL,
4668 CNTR_NORMAL,
4671 CNTR_NORMAL,
4674 CNTR_NORMAL,
4677 CNTR_NORMAL,
4680 CNTR_NORMAL,
4683 CNTR_NORMAL,
4686 CNTR_NORMAL,
4689 CNTR_NORMAL,
4692 CNTR_NORMAL,
4695 CNTR_NORMAL,
4698 CNTR_NORMAL,
4701 0, CNTR_NORMAL,
4704 CNTR_NORMAL,
4707 CNTR_NORMAL,
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4713 CNTR_NORMAL,
4716 CNTR_NORMAL,
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4732 CNTR_NORMAL,
4735 CNTR_NORMAL,
4738 CNTR_NORMAL,
4741 CNTR_NORMAL,
4744 CNTR_NORMAL,
4747 CNTR_NORMAL,
4751 0, CNTR_NORMAL,
4754 0, CNTR_NORMAL,
4757 CNTR_NORMAL,
4760 CNTR_NORMAL,
4764 CNTR_NORMAL,
4767 0, CNTR_NORMAL,
4770 CNTR_NORMAL,
4773 CNTR_NORMAL,
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4779 CNTR_NORMAL,
4782 CNTR_NORMAL,
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4812 CNTR_NORMAL,
4815 CNTR_NORMAL,
4818 CNTR_NORMAL,
4821 CNTR_NORMAL,
4824 CNTR_NORMAL,
4827 CNTR_NORMAL,
4830 CNTR_NORMAL,
4833 0, 0, CNTR_NORMAL,
4836 0, 0, CNTR_NORMAL,
4839 0, 0, CNTR_NORMAL,
4842 0, 0, CNTR_NORMAL,
4845 0, 0, CNTR_NORMAL,
4848 0, 0, CNTR_NORMAL,
4851 0, 0, CNTR_NORMAL,
4854 0, 0, CNTR_NORMAL,
4857 0, 0, CNTR_NORMAL,
4860 0, 0, CNTR_NORMAL,
4863 0, 0, CNTR_NORMAL,
4866 0, 0, CNTR_NORMAL,
4869 0, 0, CNTR_NORMAL,
4872 0, 0, CNTR_NORMAL,
4875 0, 0, CNTR_NORMAL,
4878 0, 0, CNTR_NORMAL,
4881 0, 0, CNTR_NORMAL,
4884 0, 0, CNTR_NORMAL,
4887 0, 0, CNTR_NORMAL,
4890 0, 0, CNTR_NORMAL,
4893 0, 0, CNTR_NORMAL,
4896 0, 0, CNTR_NORMAL,
4899 0, 0, CNTR_NORMAL,
4902 0, 0, CNTR_NORMAL,
4905 0, 0, CNTR_NORMAL,
4908 CNTR_NORMAL,
4911 CNTR_NORMAL,
4914 CNTR_NORMAL,
4917 CNTR_NORMAL,
4921 CNTR_NORMAL,
4924 CNTR_NORMAL,
4927 CNTR_NORMAL,
4930 0, 0, CNTR_NORMAL,
4933 CNTR_NORMAL,
4936 CNTR_NORMAL,
4939 CNTR_NORMAL,
4942 CNTR_NORMAL,
4946 CNTR_NORMAL,
4949 CNTR_NORMAL,
4952 CNTR_NORMAL,
4955 CNTR_NORMAL,
4959 CNTR_NORMAL,
4962 CNTR_NORMAL,
4965 CNTR_NORMAL,
4969 CNTR_NORMAL,
4972 CNTR_NORMAL,
4975 0, 0, CNTR_NORMAL,
4978 CNTR_NORMAL,
4981 CNTR_NORMAL,
4985 0, 0, CNTR_NORMAL,
4988 CNTR_NORMAL,
4991 CNTR_NORMAL,
4994 CNTR_NORMAL,
4997 CNTR_NORMAL,
5000 0, 0, CNTR_NORMAL,
5003 CNTR_NORMAL,
5006 CNTR_NORMAL,
5009 CNTR_NORMAL,
5012 CNTR_NORMAL,
5015 CNTR_NORMAL,
5018 CNTR_NORMAL,
5021 CNTR_NORMAL,
5024 CNTR_NORMAL,
5027 CNTR_NORMAL,
5030 CNTR_NORMAL,
5033 CNTR_NORMAL,
5036 CNTR_NORMAL,
5039 CNTR_NORMAL,
5042 CNTR_NORMAL,
5045 CNTR_NORMAL,
5048 CNTR_NORMAL,
5051 CNTR_NORMAL,
5054 CNTR_NORMAL,
5060 CNTR_NORMAL),
5062 CNTR_NORMAL),
5064 CNTR_NORMAL),
5066 CNTR_NORMAL),
5068 CNTR_NORMAL),
5070 CNTR_NORMAL),
5072 CNTR_NORMAL),
5073 [C_TX_PKT] = TXE64_PORT_CNTR_ELEM(TxPkt, SEND_DATA_PKT_CNT, CNTR_NORMAL),
5074 [C_TX_WORDS] = TXE64_PORT_CNTR_ELEM(TxWords, SEND_DWORD_CNT, CNTR_NORMAL),
5082 [C_RX_PKT] = RXE64_PORT_CNTR_ELEM(RxPkt, RCV_DATA_PKT_CNT, CNTR_NORMAL),
5083 [C_RX_WORDS] = RXE64_PORT_CNTR_ELEM(RxWords, RCV_DWORD_CNT, CNTR_NORMAL),
5088 [C_SW_UNKNOWN_FRAME] = CNTR_ELEM("UnknownFrame", 0, 0, CNTR_NORMAL,
5112 [C_SW_CPU_RC_ACKS] = CNTR_ELEM("RcAcks", 0, 0, CNTR_NORMAL,
5114 [C_SW_CPU_RC_QACKS] = CNTR_ELEM("RcQacks", 0, 0, CNTR_NORMAL,
5116 [C_SW_CPU_RC_DELAYED_COMP] = CNTR_ELEM("RcDelayComp", 0, 0, CNTR_NORMAL,