Lines Matching defs:rate
22 #define WAIT_PCLK(n, rate) \ argument
66 #define SYNQUACER_I2C_BUS_CLK_FR(rate) (((rate) / 20000000) + 1) argument
69 #define SYNQUACER_I2C_CLK_MASTER_STD(rate) \ argument
72 #define SYNQUACER_I2C_CLK_MASTER_FAST(rate) \ argument
77 #define SYNQUACER_I2C_CCR_CS_STD_MAX_18M(rate) \ argument
82 #define SYNQUACER_I2C_CSR_CS_STD_MAX_18M(rate) 0x00 argument
85 #define SYNQUACER_I2C_CCR_CS_FAST_MAX_18M(rate) \ argument
90 #define SYNQUACER_I2C_CSR_CS_FAST_MAX_18M(rate) 0x00 argument
94 #define SYNQUACER_I2C_CCR_CS_STD_MIN_18M(rate) \ argument
99 #define SYNQUACER_I2C_CSR_CS_STD_MIN_18M(rate) \ argument
104 #define SYNQUACER_I2C_CCR_CS_FAST_MIN_18M(rate) \ argument
109 #define SYNQUACER_I2C_CSR_CS_FAST_MIN_18M(rate) \ argument