57 			       int chan_rank, u32 *data);
94 	int chan_rank = dimm_no / priv->gen_info->dimm_idx_max;  in get_dimm_temp()  local
102 	ret = peci_pcs_read(priv->peci_dev, PECI_PCS_DDR_DIMM_TEMP, chan_rank, &data);  in get_dimm_temp()
120 	int chan_rank = dimm_no / priv->gen_info->dimm_idx_max;  in update_thresholds()  local
127 	ret = priv->gen_info->read_thresholds(priv, dimm_order, chan_rank, &data);  in update_thresholds()
224 	int chan_rank, dimm_idx, ret;  in check_populated_dimms()  local
235 	for (chan_rank = 0; chan_rank < chan_rank_max; chan_rank++) {  in check_populated_dimms()
236 		ret = peci_pcs_read(priv->peci_dev, PECI_PCS_DDR_DIMM_TEMP, chan_rank, &pcs);  in check_populated_dimms()
245 				chan_rank_empty |= BIT(chan_rank);  in check_populated_dimms()
254 				dimm_mask |= BIT(chan_rank * dimm_idx_max + dimm_idx);  in check_populated_dimms()
419 read_thresholds_hsx(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u32 *data)  in read_thresholds_hsx()  argument
435 	dev = 20 + chan_rank / 2 + chan_rank / 4;  in read_thresholds_hsx()
436 	func = chan_rank % 2;  in read_thresholds_hsx()
447 read_thresholds_bdxd(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u32 *data)  in read_thresholds_bdxd()  argument
459 	dev = 10 + chan_rank / 2 * 2;  in read_thresholds_bdxd()
460 	func = (chan_rank % 2) ? 6 : 2;  in read_thresholds_bdxd()
471 read_thresholds_skx(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u32 *data)  in read_thresholds_skx()  argument
485 	dev = 10 + chan_rank / 3 * 2 + (chan_rank % 3 == 2 ? 1 : 0);  in read_thresholds_skx()
486 	func = chan_rank % 3 == 1 ? 6 : 2;  in read_thresholds_skx()
497 read_thresholds_icx(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u32 *data)  in read_thresholds_icx()  argument
522 	dev = 26 + chan_rank / 2;  in read_thresholds_icx()
523 	offset = 0x224e0 + dimm_order * 4 + (chan_rank % 2) * 0x4000;  in read_thresholds_icx()