Lines Matching refs:sparepll
49 u8 sparepll; member
69 .sparepll = 0x0,
84 .sparepll = 0x0,
99 .sparepll = 0x0,
114 .sparepll = 0x0,
129 .sparepll = 0x0,
148 .sparepll = 0x0,
163 .sparepll = 0x0,
178 .sparepll = 0x0,
193 .sparepll = 0x0,
213 .sparepll = 0x54,
228 .sparepll = 0x44,
243 .sparepll = 0x00, /* 0x34 */
258 .sparepll = 0x34,
273 .sparepll = 0x34,
292 .sparepll = 0x54,
307 .sparepll = 0x44,
322 .sparepll = 0x00, /* 0x34 */
337 .sparepll = 0x34,
352 .sparepll = 0x34,
2543 value |= SOR_DP_PADCTL_SPAREPLL(settings->sparepll); in tegra_sor_hdmi_enable()