367 	unsigned int pll2;  member
1450 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_power_down()
1452 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_power_down()
1460 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_power_down()
1463 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_power_down()
2286 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2288 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2301 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2303 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2307 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2310 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2769 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2771 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2783 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2786 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2790 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2793 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
3293 	.pll2 = 0x19,
3465 	.pll2 = 0x19,
3526 	.pll2 = 0x165,
3609 	.pll2 = 0x16b,