369 	unsigned int dp_padctl0;  member
652 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_power_up_lanes()
671 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_power_up_lanes()
700 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_power_down_lanes()
703 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_power_down_lanes()
731 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_precharge()
750 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_precharge()
754 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_precharge()
757 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_precharge()
765 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_term_calibrate()
767 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_term_calibrate()
796 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_term_calibrate()
798 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_term_calibrate()
861 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_link_apply_training()
865 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_dp_link_apply_training()
2314 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2317 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2482 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2484 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2535 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2539 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2547 	value = tegra_sor_readl(sor, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
2549 	tegra_sor_writel(sor, value, sor->soc->regs->dp_padctl0);  in tegra_sor_hdmi_enable()
3295 	.dp_padctl0 = 0x5c,
3467 	.dp_padctl0 = 0x5c,
3528 	.dp_padctl0 = 0x168,
3611 	.dp_padctl0 = 0x16e,