320 							     u32 reference_clock,  in rv770_calculate_fractional_mpll_feedback_divider()  argument
338 		(8 * fyclk * reference_divider * post_divider) / reference_clock;  in rv770_calculate_fractional_mpll_feedback_divider()
405 	u32 reference_clock = rdev->clock.mpll.reference_freq;  in rv770_populate_mclk_value()  local
419 	rv770_calculate_fractional_mpll_feedback_divider(memory_clock, reference_clock,  in rv770_populate_mclk_value()
447 								 reference_clock,  in rv770_populate_mclk_value()
502 	u32 reference_clock = rdev->clock.spll.reference_freq;  in rv770_populate_sclk_value()  local
520 	do_div(tmp, reference_clock);  in rv770_populate_sclk_value()
545 			u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate);  in rv770_populate_sclk_value()
1707 	u32 reference_clock;  in rv770_program_response_times()  local
1721 	reference_clock = radeon_get_xclk(rdev);  in rv770_program_response_times()
1723 	vddc_dly = (voltage_response_time  * reference_clock) / 1600;  in rv770_program_response_times()
1724 	bb_dly = (backbias_response_time * reference_clock) / 1600;  in rv770_program_response_times()
1725 	acpi_dly = (acpi_delay_time * reference_clock) / 1600;  in rv770_program_response_times()
1726 	vbi_dly = (vbi_time_out * reference_clock) / 1600;  in rv770_program_response_times()