Lines Matching refs:WREG32

276 	WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));  in ni_read_disabled_bios()
279 WREG32(AVIVO_D1VGA_CONTROL, in ni_read_disabled_bios()
282 WREG32(AVIVO_D2VGA_CONTROL, in ni_read_disabled_bios()
285 WREG32(AVIVO_VGA_RENDER_CONTROL, in ni_read_disabled_bios()
288 WREG32(R600_ROM_CNTL, rom_cntl | R600_SCK_OVERWRITE); in ni_read_disabled_bios()
293 WREG32(R600_BUS_CNTL, bus_cntl); in ni_read_disabled_bios()
295 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in ni_read_disabled_bios()
296 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control); in ni_read_disabled_bios()
297 WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); in ni_read_disabled_bios()
299 WREG32(R600_ROM_CNTL, rom_cntl); in ni_read_disabled_bios()
323 WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); in r700_read_disabled_bios()
325 WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS)); in r700_read_disabled_bios()
327 WREG32(AVIVO_D1VGA_CONTROL, in r700_read_disabled_bios()
330 WREG32(AVIVO_D2VGA_CONTROL, in r700_read_disabled_bios()
333 WREG32(AVIVO_VGA_RENDER_CONTROL, in r700_read_disabled_bios()
340 WREG32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl | in r700_read_disabled_bios()
348 WREG32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE)); in r700_read_disabled_bios()
350 WREG32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE)); in r700_read_disabled_bios()
356 WREG32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl); in r700_read_disabled_bios()
363 WREG32(RADEON_VIPH_CONTROL, viph_control); in r700_read_disabled_bios()
364 WREG32(R600_BUS_CNTL, bus_cntl); in r700_read_disabled_bios()
365 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in r700_read_disabled_bios()
366 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control); in r700_read_disabled_bios()
367 WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); in r700_read_disabled_bios()
368 WREG32(R600_ROM_CNTL, rom_cntl); in r700_read_disabled_bios()
402 WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); in r600_read_disabled_bios()
404 WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS)); in r600_read_disabled_bios()
406 WREG32(AVIVO_D1VGA_CONTROL, in r600_read_disabled_bios()
409 WREG32(AVIVO_D2VGA_CONTROL, in r600_read_disabled_bios()
412 WREG32(AVIVO_VGA_RENDER_CONTROL, in r600_read_disabled_bios()
415 WREG32(R600_ROM_CNTL, in r600_read_disabled_bios()
420 WREG32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS)); in r600_read_disabled_bios()
421 WREG32(R600_LOW_VID_LOWER_GPIO_CNTL, in r600_read_disabled_bios()
423 WREG32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, in r600_read_disabled_bios()
425 WREG32(R600_HIGH_VID_LOWER_GPIO_CNTL, in r600_read_disabled_bios()
427 WREG32(R600_CTXSW_VID_LOWER_GPIO_CNTL, in r600_read_disabled_bios()
429 WREG32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400)); in r600_read_disabled_bios()
434 WREG32(RADEON_VIPH_CONTROL, viph_control); in r600_read_disabled_bios()
435 WREG32(R600_BUS_CNTL, bus_cntl); in r600_read_disabled_bios()
436 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in r600_read_disabled_bios()
437 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control); in r600_read_disabled_bios()
438 WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); in r600_read_disabled_bios()
439 WREG32(R600_ROM_CNTL, rom_cntl); in r600_read_disabled_bios()
440 WREG32(R600_GENERAL_PWRMGT, general_pwrmgt); in r600_read_disabled_bios()
441 WREG32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl); in r600_read_disabled_bios()
442 WREG32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl); in r600_read_disabled_bios()
443 WREG32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl); in r600_read_disabled_bios()
444 WREG32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl); in r600_read_disabled_bios()
445 WREG32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable); in r600_read_disabled_bios()
472 WREG32(RADEON_SEPROM_CNTL1, in avivo_read_disabled_bios()
475 WREG32(RADEON_GPIOPAD_A, 0); in avivo_read_disabled_bios()
476 WREG32(RADEON_GPIOPAD_EN, 0); in avivo_read_disabled_bios()
477 WREG32(RADEON_GPIOPAD_MASK, 0); in avivo_read_disabled_bios()
480 WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); in avivo_read_disabled_bios()
483 WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM)); in avivo_read_disabled_bios()
486 WREG32(AVIVO_D1VGA_CONTROL, in avivo_read_disabled_bios()
489 WREG32(AVIVO_D2VGA_CONTROL, in avivo_read_disabled_bios()
492 WREG32(AVIVO_VGA_RENDER_CONTROL, in avivo_read_disabled_bios()
498 WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1); in avivo_read_disabled_bios()
499 WREG32(RADEON_VIPH_CONTROL, viph_control); in avivo_read_disabled_bios()
500 WREG32(RV370_BUS_CNTL, bus_cntl); in avivo_read_disabled_bios()
501 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in avivo_read_disabled_bios()
502 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control); in avivo_read_disabled_bios()
503 WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); in avivo_read_disabled_bios()
504 WREG32(RADEON_GPIOPAD_A, gpiopad_a); in avivo_read_disabled_bios()
505 WREG32(RADEON_GPIOPAD_EN, gpiopad_en); in avivo_read_disabled_bios()
506 WREG32(RADEON_GPIOPAD_MASK, gpiopad_mask); in avivo_read_disabled_bios()
540 WREG32(RADEON_SEPROM_CNTL1, in legacy_read_disabled_bios()
545 WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); in legacy_read_disabled_bios()
549 WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM)); in legacy_read_disabled_bios()
551 WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM)); in legacy_read_disabled_bios()
554 WREG32(RADEON_CRTC_GEN_CNTL, in legacy_read_disabled_bios()
559 WREG32(RADEON_CRTC2_GEN_CNTL, in legacy_read_disabled_bios()
564 WREG32(RADEON_CRTC_EXT_CNTL, in legacy_read_disabled_bios()
570 WREG32(RADEON_FP2_GEN_CNTL, (fp2_gen_cntl & ~RADEON_FP2_ON)); in legacy_read_disabled_bios()
576 WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1); in legacy_read_disabled_bios()
577 WREG32(RADEON_VIPH_CONTROL, viph_control); in legacy_read_disabled_bios()
579 WREG32(RV370_BUS_CNTL, bus_cntl); in legacy_read_disabled_bios()
581 WREG32(RADEON_BUS_CNTL, bus_cntl); in legacy_read_disabled_bios()
582 WREG32(RADEON_CRTC_GEN_CNTL, crtc_gen_cntl); in legacy_read_disabled_bios()
584 WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); in legacy_read_disabled_bios()
586 WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl); in legacy_read_disabled_bios()
588 WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl); in legacy_read_disabled_bios()