559 				data = RREG32_SMC(config_regs->offset);  in ci_program_pt_config_registers()
861 	tmp = RREG32_SMC(CG_THERMAL_INT);  in ci_thermal_set_temperature_range()
869 	tmp = RREG32_SMC(CG_THERMAL_CTRL);  in ci_thermal_set_temperature_range()
884 	u32 thermal_int = RREG32_SMC(CG_THERMAL_INT);  in ci_thermal_enable_alert()
916 		tmp = (RREG32_SMC(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK) >> FDO_PWM_MODE_SHIFT;  in ci_fan_ctrl_set_static_mode()
918 		tmp = (RREG32_SMC(CG_FDO_CTRL2) & TMIN_MASK) >> TMIN_SHIFT;  in ci_fan_ctrl_set_static_mode()
923 	tmp = RREG32_SMC(CG_FDO_CTRL2) & ~TMIN_MASK;  in ci_fan_ctrl_set_static_mode()
927 	tmp = RREG32_SMC(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;  in ci_fan_ctrl_set_static_mode()
948 	duty100 = (RREG32_SMC(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT;  in ci_thermal_setup_fan_table()
992 	tmp = (RREG32_SMC(CG_MULT_THERMAL_CTRL) & TEMP_SEL_MASK) >> TEMP_SEL_SHIFT;  in ci_thermal_setup_fan_table()
1059 	duty100 = (RREG32_SMC(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT;  in ci_fan_ctrl_get_fan_speed_percent()
1060 	duty = (RREG32_SMC(CG_THERMAL_STATUS) & FDO_PWM_DUTY_MASK) >> FDO_PWM_DUTY_SHIFT;  in ci_fan_ctrl_get_fan_speed_percent()
1092 	duty100 = (RREG32_SMC(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT;  in ci_fan_ctrl_set_fan_speed_percent()
1101 	tmp = RREG32_SMC(CG_FDO_CTRL0) & ~FDO_STATIC_DUTY_MASK;  in ci_fan_ctrl_set_fan_speed_percent()
1132 	tmp = RREG32_SMC(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK;  in ci_fan_ctrl_get_mode()
1149 	tach_period = (RREG32_SMC(CG_TACH_STATUS) & TACH_PERIOD_MASK) >> TACH_PERIOD_SHIFT;
1178 	tmp = RREG32_SMC(CG_TACH_CTRL) & ~TARGET_PERIOD_MASK;
1194 		tmp = RREG32_SMC(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;  in ci_fan_ctrl_set_default_mode()
1198 		tmp = RREG32_SMC(CG_FDO_CTRL2) & ~TMIN_MASK;  in ci_fan_ctrl_set_default_mode()
1218 		tmp = RREG32_SMC(CG_TACH_CTRL) & ~EDGE_PER_REV_MASK;  in ci_thermal_initialize()
1223 	tmp = RREG32_SMC(CG_FDO_CTRL2) & ~TACH_PWM_RESP_RATE_MASK;  in ci_thermal_initialize()
1379 		tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_set_dpm_event_sources()
1386 		tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_set_dpm_event_sources()
1496 	tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_start_dpm()
1500 	tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);  in ci_start_dpm()
1557 	tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_stop_dpm()
1561 	tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);  in ci_stop_dpm()
1584 	u32 tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);  in ci_enable_sclk_control()
1768 		if (RREG32_SMC(FIRMWARE_FLAGS) & INTERRUPTS_ENABLED)  in ci_dpm_start_smc()
1838 		RREG32_SMC(CG_SPLL_FUNC_CNTL);  in ci_read_clock_registers()
1840 		RREG32_SMC(CG_SPLL_FUNC_CNTL_2);  in ci_read_clock_registers()
1842 		RREG32_SMC(CG_SPLL_FUNC_CNTL_3);  in ci_read_clock_registers()
1844 		RREG32_SMC(CG_SPLL_FUNC_CNTL_4);  in ci_read_clock_registers()
1846 		RREG32_SMC(CG_SPLL_SPREAD_SPECTRUM);  in ci_read_clock_registers()
1848 		RREG32_SMC(CG_SPLL_SPREAD_SPECTRUM_2);  in ci_read_clock_registers()
1870 	u32 tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_enable_thermal_protection()
1881 	u32 tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_enable_acpi_power_management()
1950 	u32 tmp = RREG32_SMC(CG_DISPLAY_GAP_CNTL);  in ci_program_display_gap()
1989 			tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_enable_spread_spectrum()
1994 		tmp = RREG32_SMC(CG_SPLL_SPREAD_SPECTRUM);  in ci_enable_spread_spectrum()
1998 		tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_enable_spread_spectrum()
2011 	u32 tmp = RREG32_SMC(CG_DISPLAY_GAP_CNTL);  in ci_enable_display_gap()
2024 	tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);  in ci_program_vc()
2042 	tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);  in ci_clear_vc()
2062 		if (RREG32_SMC(RCU_UC_EVENTS) & BOOT_SEQ_DONE)  in ci_upload_firmware()
2448 	tmp = (RREG32_SMC(SMC_SCRATCH9) & 0x0000ff00) >> 8;  in ci_force_switch_to_arb_f0()
4051 		tmp = RREG32_SMC(DPM_TABLE_475);  in ci_update_uvd_dpm()
4089 			tmp = RREG32_SMC(DPM_TABLE_475);  in ci_update_vce_dpm()
4119 		tmp = RREG32_SMC(DPM_TABLE_475);
4186 					tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX_1) &  in ci_dpm_force_performance_level()
4205 					tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX) &  in ci_dpm_force_performance_level()
4224 					tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX) &  in ci_dpm_force_performance_level()
4241 				tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX) &  in ci_dpm_force_performance_level()
4256 				tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX) &  in ci_dpm_force_performance_level()
4271 				tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX_1) &  in ci_dpm_force_performance_level()
4752 	u32 tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_enable_voltage_control()
5809 		u32 tmp = RREG32_SMC(CNB_PWRMGT_CNTL);  in ci_dpm_init()