29 g84_pcie_version_supported(struct nvkm_pci *pci)  in g84_pcie_version_supported()  argument
36 g84_pcie_version(struct nvkm_pci *pci)  in g84_pcie_version()  argument
38 	struct nvkm_device *device = pci->subdev.device;  in g84_pcie_version()
43 g84_pcie_set_version(struct nvkm_pci *pci, u8 ver)  in g84_pcie_set_version()  argument
45 	struct nvkm_device *device = pci->subdev.device;  in g84_pcie_set_version()
50 g84_pcie_set_cap_speed(struct nvkm_pci *pci, bool full_speed)  in g84_pcie_set_cap_speed()  argument
52 	struct nvkm_device *device = pci->subdev.device;  in g84_pcie_set_cap_speed()
57 g84_pcie_cur_speed(struct nvkm_pci *pci)  in g84_pcie_cur_speed()  argument
59 	u32 reg_v = nvkm_pci_rd32(pci, 0x88) & 0x30000;  in g84_pcie_cur_speed()
72 g84_pcie_max_speed(struct nvkm_pci *pci)  in g84_pcie_max_speed()  argument
74 	u32 reg_v = nvkm_pci_rd32(pci, 0x460) & 0x3300;  in g84_pcie_max_speed()
81 g84_pcie_set_link_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)  in g84_pcie_set_link_speed()  argument
90 	nvkm_pci_mask(pci, 0x460, 0x30, mask_value);  in g84_pcie_set_link_speed()
91 	nvkm_pci_mask(pci, 0x460, 0x1, 0x1);  in g84_pcie_set_link_speed()
95 g84_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed speed, u8 width)  in g84_pcie_set_link()  argument
97 	g84_pcie_set_cap_speed(pci, speed == NVKM_PCIE_SPEED_5_0);  in g84_pcie_set_link()
98 	g84_pcie_set_link_speed(pci, speed);  in g84_pcie_set_link()
103 g84_pci_init(struct nvkm_pci *pci)  in g84_pci_init()  argument
106 	if (!pci_is_pcie(pci->pdev))  in g84_pci_init()
119 	if (nvkm_pci_rd32(pci, 0x007c) & 0x00000020)  in g84_pci_init()
120 		nvkm_pci_mask(pci, 0x0080, 0x00000100, 0x00000100);  in g84_pci_init()
122 		nvkm_pci_mask(pci, 0x041c, 0x00000060, 0x00000000);  in g84_pci_init()
126 g84_pcie_init(struct nvkm_pci *pci)  in g84_pcie_init()  argument
128 	bool full_speed = g84_pcie_cur_speed(pci) == NVKM_PCIE_SPEED_5_0;  in g84_pcie_init()
129 	g84_pcie_set_cap_speed(pci, full_speed);  in g84_pcie_init()