71 nvkm_gddr3_calc(struct nvkm_ram *ram)  in nvkm_gddr3_calc()  argument
75 	switch (ram->next->bios.timing_ver) {  in nvkm_gddr3_calc()
77 		CWL = ram->next->bios.timing_10_CWL;  in nvkm_gddr3_calc()
78 		CL  = ram->next->bios.timing_10_CL;  in nvkm_gddr3_calc()
79 		WR  = ram->next->bios.timing_10_WR;  in nvkm_gddr3_calc()
80 		DLL = !ram->next->bios.ramcfg_DLLoff;  in nvkm_gddr3_calc()
81 		ODT = ram->next->bios.timing_10_ODT;  in nvkm_gddr3_calc()
82 		RON = ram->next->bios.ramcfg_RON;  in nvkm_gddr3_calc()
85 		CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7;  in nvkm_gddr3_calc()
86 		CL  = (ram->next->bios.timing[1] & 0x0000001f) >> 0;  in nvkm_gddr3_calc()
87 		WR  = (ram->next->bios.timing[2] & 0x007f0000) >> 16;  in nvkm_gddr3_calc()
89 		DLL = !(ram->mr[1] & 0x1);  in nvkm_gddr3_calc()
90 		RON = !((ram->mr[1] & 0x300) >> 8);  in nvkm_gddr3_calc()
96 	if (ram->next->bios.timing_ver == 0x20 ||  in nvkm_gddr3_calc()
97 	    ram->next->bios.ramcfg_timing == 0xff) {  in nvkm_gddr3_calc()
98 		ODT =  (ram->mr[1] & 0xc) >> 2;  in nvkm_gddr3_calc()
101 	hi = ram->mr[2] & 0x1;  in nvkm_gddr3_calc()
107 	ram->mr[0] &= ~0xf74;  in nvkm_gddr3_calc()
108 	ram->mr[0] |= (CWL & 0x07) << 9;  in nvkm_gddr3_calc()
109 	ram->mr[0] |= (CL & 0x07) << 4;  in nvkm_gddr3_calc()
110 	ram->mr[0] |= (CL & 0x08) >> 1;  in nvkm_gddr3_calc()
112 	ram->mr[1] &= ~0x3fc;  in nvkm_gddr3_calc()
113 	ram->mr[1] |= (ODT & 0x03) << 2;  in nvkm_gddr3_calc()
114 	ram->mr[1] |= (RON & 0x03) << 8;  in nvkm_gddr3_calc()
115 	ram->mr[1] |= (WR  & 0x03) << 4;  in nvkm_gddr3_calc()
116 	ram->mr[1] |= (WR  & 0x04) << 5;  in nvkm_gddr3_calc()
117 	ram->mr[1] |= !DLL << 6;  in nvkm_gddr3_calc()