Lines Matching refs:r14
121 nv_rd32($r14, 0x409604)
145 ld b32 $r14 D[$r0 + #hub_mmio_list_head]
179 add b32 $r14 $r4 0x804
182 add b32 $r14 $r4 0x10c
185 add b32 $r14 $r4 0x104
187 add b32 $r14 $r4 0x100
192 add b32 $r14 $r4 0x800
197 add b32 $r14 $r4 0x804
231 cmpu b32 $r14 0x4001
279 cmpu b32 $r14 0x0001
287 cmpu b32 $r14 0x0002
297 shl b32 $r15 $r14 16
318 push $r14
328 nv_iord($r14, NV_PGRAPH_FECS_FIFO_CMD, 0)
332 mov $r14 1
333 nv_iowr(NV_PGRAPH_FECS_FIFO_ACK, 0, $r14)
341 mov $r14 0x4001
353 extr $r14 $r15 16:18
354 shl b32 $r14 $r14 2
356 add b32 $r14 $r15
377 pop $r14
433 mov $r14 NV_PGRAPH_FECS_RED_SWITCH_ENABLE_GPC
434 or $r14 NV_PGRAPH_FECS_RED_SWITCH_POWER_ROP
435 or $r14 NV_PGRAPH_FECS_RED_SWITCH_POWER_GPC
436 or $r14 NV_PGRAPH_FECS_RED_SWITCH_POWER_MAIN
437 nv_iowr(NV_PGRAPH_FECS_RED_SWITCH, 0, $r14)
442 or $r14 NV_PGRAPH_FECS_RED_SWITCH_ENABLE_ROP
443 or $r14 NV_PGRAPH_FECS_RED_SWITCH_ENABLE_MAIN
444 nv_iowr(NV_PGRAPH_FECS_RED_SWITCH, 0, $r14)
572 ld b32 $r14 D[$r4 + #xfer_data + 0x00]
604 mov $r14 4
605 nv_iowr(0x409c08, 0, $r14)
607 nv_iord($r14, 0x409c00, 0)
608 and $r14 0x2000
658 mov $r14 0 // not multi