174 	struct dpu_encoder_phys *phys_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL];  member
236 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_get_crc_values_cnt()
255 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_setup_misr()
278 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_get_crc()
461 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_destroy()
466 			dpu_enc->phys_encs[i] = NULL;  in dpu_encoder_destroy()
535 		if (dpu_enc->phys_encs[i])  in dpu_encoder_use_dsc_merge()
554 		if (dpu_enc->phys_encs[i])  in dpu_encoder_get_topology()
634 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_virt_atomic_check()
729 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in _dpu_encoder_irq_control()
992 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_prepare_wb_job()
1009 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_cleanup_wb_job()
1097 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_virt_atomic_mode_set()
1231 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_virt_disable()
1356 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_toggle_vblank_for_crtc()
1409 			if (dpu_enc->phys_encs[i] == ready_phys) {  in dpu_encoder_frame_done_callback()
1592 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in _dpu_encoder_kickoff_phys()
1643 		phys = dpu_enc->phys_encs[i];  in dpu_encoder_trigger_kickoff_pending()
1896 		phys = dpu_enc->phys_encs[i];  in dpu_encoder_prepare_for_kickoff()
1910 			dpu_encoder_helper_hw_reset(dpu_enc->phys_encs[i]);  in dpu_encoder_prepare_for_kickoff()
1928 			phys = dpu_enc->phys_encs[i];  in dpu_encoder_is_valid_for_commit()
1964 		phys = dpu_enc->phys_encs[i];  in dpu_encoder_kickoff()
2040 			if (dpu_enc->phys_encs[i] && phys_enc->hw_intf->ops.bind_pingpong_blk)  in dpu_encoder_helper_phys_cleanup()
2042 						dpu_enc->phys_encs[i]->hw_intf, false,  in dpu_encoder_helper_phys_cleanup()
2043 						dpu_enc->phys_encs[i]->hw_pp->idx);  in dpu_encoder_helper_phys_cleanup()
2048 						dpu_enc->phys_encs[i]->hw_intf->idx);  in dpu_encoder_helper_phys_cleanup()
2093 		phys = dpu_enc->phys_encs[i];  in dpu_encoder_prepare_commit()
2107 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in _dpu_encoder_status_show()
2146 		if (dpu_enc->phys_encs[i]->ops.late_register)  in _dpu_encoder_init_debugfs()
2147 			dpu_enc->phys_encs[i]->ops.late_register(  in _dpu_encoder_init_debugfs()
2148 					dpu_enc->phys_encs[i],  in _dpu_encoder_init_debugfs()
2186 			ARRAY_SIZE(dpu_enc->phys_encs)) {  in dpu_encoder_virt_add_phys_encs()
2202 		dpu_enc->phys_encs[dpu_enc->num_phys_encs] = enc;  in dpu_encoder_virt_add_phys_encs()
2213 		dpu_enc->phys_encs[dpu_enc->num_phys_encs] = enc;  in dpu_encoder_virt_add_phys_encs()
2224 		dpu_enc->phys_encs[dpu_enc->num_phys_encs] = enc;  in dpu_encoder_virt_add_phys_encs()
2340 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_setup_display()
2501 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_wait_for_event()
2545 		return dpu_enc->phys_encs[0]->intf_mode;  in dpu_encoder_get_intf_mode()