178 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_zap_shader_load()  local
191 	return zap_shader_load_mdt(gpu, adreno_gpu->info->zapfw, pasid);  in adreno_zap_shader_load()
237 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_private_address_space_size()  local
242 	if (adreno_gpu->info->address_space_size)  in adreno_private_address_space_size()
243 		return adreno_gpu->info->address_space_size;  in adreno_private_address_space_size()
251 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_get_param()  local
259 		*value = adreno_gpu->info->revn;  in adreno_get_param()
262 		*value = adreno_gpu->gmem;  in adreno_get_param()
265 		*value = !adreno_is_a650_family(adreno_gpu) ? 0x100000 : 0;  in adreno_get_param()
268 		*value =  (uint64_t)adreno_gpu->rev.patchid |  in adreno_get_param()
269 			 ((uint64_t)adreno_gpu->rev.minor << 8) |  in adreno_get_param()
270 			 ((uint64_t)adreno_gpu->rev.major << 16) |  in adreno_get_param()
271 			 ((uint64_t)adreno_gpu->rev.core  << 24);  in adreno_get_param()
272 		if (!adreno_gpu->info->revn)  in adreno_get_param()
273 			*value |= ((uint64_t) adreno_gpu->speedbin) << 32;  in adreno_get_param()
276 		*value = adreno_gpu->base.fast_rate;  in adreno_get_param()
279 		if (adreno_gpu->funcs->get_timestamp) {  in adreno_get_param()
283 			ret = adreno_gpu->funcs->get_timestamp(gpu, value);  in adreno_get_param()
380 adreno_request_fw(struct adreno_gpu *adreno_gpu, const char *fwname)  in adreno_request_fw()  argument
382 	struct drm_device *drm = adreno_gpu->base.dev;  in adreno_request_fw()
395 	if ((adreno_gpu->fwloc == FW_LOCATION_UNKNOWN) ||  in adreno_request_fw()
396 	    (adreno_gpu->fwloc == FW_LOCATION_NEW)) {  in adreno_request_fw()
402 			adreno_gpu->fwloc = FW_LOCATION_NEW;  in adreno_request_fw()
404 		} else if (adreno_gpu->fwloc != FW_LOCATION_UNKNOWN) {  in adreno_request_fw()
415 	if ((adreno_gpu->fwloc == FW_LOCATION_UNKNOWN) ||  in adreno_request_fw()
416 	    (adreno_gpu->fwloc == FW_LOCATION_LEGACY)) {  in adreno_request_fw()
422 			adreno_gpu->fwloc = FW_LOCATION_LEGACY;  in adreno_request_fw()
424 		} else if (adreno_gpu->fwloc != FW_LOCATION_UNKNOWN) {  in adreno_request_fw()
436 	if ((adreno_gpu->fwloc == FW_LOCATION_UNKNOWN) ||  in adreno_request_fw()
437 	    (adreno_gpu->fwloc == FW_LOCATION_HELPER)) {  in adreno_request_fw()
443 			adreno_gpu->fwloc = FW_LOCATION_HELPER;  in adreno_request_fw()
445 		} else if (adreno_gpu->fwloc != FW_LOCATION_UNKNOWN) {  in adreno_request_fw()
460 int adreno_load_fw(struct adreno_gpu *adreno_gpu)  in adreno_load_fw()  argument
464 	for (i = 0; i < ARRAY_SIZE(adreno_gpu->info->fw); i++) {  in adreno_load_fw()
467 		if (!adreno_gpu->info->fw[i])  in adreno_load_fw()
471 		if (adreno_gpu->fw[i])  in adreno_load_fw()
474 		fw = adreno_request_fw(adreno_gpu, adreno_gpu->info->fw[i]);  in adreno_load_fw()
478 		adreno_gpu->fw[i] = fw;  in adreno_load_fw()
505 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_hw_init()  local
510 	ret = adreno_load_fw(adreno_gpu);  in adreno_hw_init()
537 static uint32_t get_rptr(struct adreno_gpu *adreno_gpu,  in get_rptr()  argument
540 	struct msm_gpu *gpu = &adreno_gpu->base;  in get_rptr()
590 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_idle()  local
594 	if (!spin_until(get_rptr(adreno_gpu, ring) == wptr))  in adreno_idle()
599 		gpu->name, ring->id, get_rptr(adreno_gpu, ring), wptr);  in adreno_idle()
606 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_gpu_state_get()  local
621 		state->ring[i].rptr = get_rptr(adreno_gpu, gpu->rb[i]);  in adreno_gpu_state_get()
642 	if (!adreno_gpu->registers)  in adreno_gpu_state_get()
646 	for (i = 0; adreno_gpu->registers[i] != ~0; i += 2)  in adreno_gpu_state_get()
647 		count += adreno_gpu->registers[i + 1] -  in adreno_gpu_state_get()
648 			adreno_gpu->registers[i] + 1;  in adreno_gpu_state_get()
654 		for (i = 0; adreno_gpu->registers[i] != ~0; i += 2) {  in adreno_gpu_state_get()
655 			u32 start = adreno_gpu->registers[i];  in adreno_gpu_state_get()
656 			u32 end   = adreno_gpu->registers[i + 1];  in adreno_gpu_state_get()
786 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_show()  local
793 			adreno_gpu->info->revn, adreno_gpu->rev.core,  in adreno_show()
794 			adreno_gpu->rev.major, adreno_gpu->rev.minor,  in adreno_show()
795 			adreno_gpu->rev.patchid);  in adreno_show()
863 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_dump_info()  local
867 			adreno_gpu->info->revn, adreno_gpu->rev.core,  in adreno_dump_info()
868 			adreno_gpu->rev.major, adreno_gpu->rev.minor,  in adreno_dump_info()
869 			adreno_gpu->rev.patchid);  in adreno_dump_info()
878 		printk("rptr:     %d\n", get_rptr(adreno_gpu, ring));  in adreno_dump_info()
886 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_dump()  local
889 	if (!adreno_gpu->registers)  in adreno_dump()
894 	for (i = 0; adreno_gpu->registers[i] != ~0; i += 2) {  in adreno_dump()
895 		uint32_t start = adreno_gpu->registers[i];  in adreno_dump()
896 		uint32_t end   = adreno_gpu->registers[i+1];  in adreno_dump()
908 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(ring->gpu);  in ring_freewords()  local
912 	uint32_t rptr = get_rptr(adreno_gpu, ring);  in ring_freewords()
993 int adreno_gpu_ocmem_init(struct device *dev, struct adreno_gpu *adreno_gpu,  in adreno_gpu_ocmem_init()  argument
1013 	ocmem_hdl = ocmem_allocate(ocmem, OCMEM_GRAPHICS, adreno_gpu->gmem);  in adreno_gpu_ocmem_init()
1020 	adreno_gpu->gmem = ocmem_hdl->len;  in adreno_gpu_ocmem_init()
1038 		struct adreno_gpu *adreno_gpu,  in adreno_gpu_init()  argument
1044 	struct msm_gpu *gpu = &adreno_gpu->base;  in adreno_gpu_init()
1049 	adreno_gpu->funcs = funcs;  in adreno_gpu_init()
1050 	adreno_gpu->info = adreno_info(config->rev);  in adreno_gpu_init()
1051 	adreno_gpu->gmem = adreno_gpu->info->gmem;  in adreno_gpu_init()
1052 	adreno_gpu->revn = adreno_gpu->info->revn;  in adreno_gpu_init()
1053 	adreno_gpu->rev = *rev;  in adreno_gpu_init()
1057 	adreno_gpu->speedbin = (uint16_t) (0xffff & speedbin);  in adreno_gpu_init()
1059 	gpu_name = adreno_gpu->info->name;  in adreno_gpu_init()
1075 		adreno_gpu->info->inactive_period);  in adreno_gpu_init()
1078 	return msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base,  in adreno_gpu_init()
1082 void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu)  in adreno_gpu_cleanup()  argument
1084 	struct msm_gpu *gpu = &adreno_gpu->base;  in adreno_gpu_cleanup()
1088 	for (i = 0; i < ARRAY_SIZE(adreno_gpu->info->fw); i++)  in adreno_gpu_cleanup()
1089 		release_firmware(adreno_gpu->fw[i]);  in adreno_gpu_cleanup()
1094 	msm_gpu_cleanup(&adreno_gpu->base);  in adreno_gpu_cleanup()