153 	gpu_write(gpu, REG_A6XX_CP_CRASH_DUMP_CNTL, 1);  in a6xx_crashdumper_run()
158 	gpu_write(gpu, REG_A6XX_CP_CRASH_DUMP_CNTL, 0);  in a6xx_crashdumper_run()
170 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_SEL_A, reg);  in debugbus_read()
171 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_SEL_B, reg);  in debugbus_read()
172 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_SEL_C, reg);  in debugbus_read()
173 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_SEL_D, reg);  in debugbus_read()
217 	gpu_write(gpu, ctrl0, reg);  in vbif_debugbus_read()
220 		gpu_write(gpu, ctrl1, i);  in vbif_debugbus_read()
254 	gpu_write(gpu, REG_A6XX_VBIF_CLKON,  in a6xx_get_vbif_debugbus_block()
258 	gpu_write(gpu, REG_A6XX_VBIF_TEST_BUS1_CTRL0, 0);  in a6xx_get_vbif_debugbus_block()
261 	gpu_write(gpu, REG_A6XX_VBIF_TEST_BUS_OUT_CTRL, 1);  in a6xx_get_vbif_debugbus_block()
278 	gpu_write(gpu, REG_A6XX_VBIF_TEST_BUS2_CTRL0, 0);  in a6xx_get_vbif_debugbus_block()
287 	gpu_write(gpu, REG_A6XX_VBIF_CLKON, clk);  in a6xx_get_vbif_debugbus_block()
335 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_CNTLT,  in a6xx_get_debugbus()
338 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_CNTLM,  in a6xx_get_debugbus()
341 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_0, 0);  in a6xx_get_debugbus()
342 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_1, 0);  in a6xx_get_debugbus()
343 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_2, 0);  in a6xx_get_debugbus()
344 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_3, 0);  in a6xx_get_debugbus()
346 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_BYTEL_0, 0x76543210);  in a6xx_get_debugbus()
347 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_BYTEL_1, 0xFEDCBA98);  in a6xx_get_debugbus()
349 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_0, 0);  in a6xx_get_debugbus()
350 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_1, 0);  in a6xx_get_debugbus()
351 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_2, 0);  in a6xx_get_debugbus()
352 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_3, 0);  in a6xx_get_debugbus()
805 	gpu_write(gpu, REG_A6XX_GMU_AO_AHB_FENCE_CTRL, 0);  in a6xx_get_gmu_registers()
927 	gpu_write(gpu, indexed->addr, 0);  in a6xx_get_indexed_regs()
952 	gpu_write(gpu, REG_A6XX_CP_MEM_POOL_SIZE, 0);  in a6xx_get_indexed_registers()
965 	gpu_write(gpu, REG_A6XX_CP_MEM_POOL_SIZE, mempool_size);  in a6xx_get_indexed_registers()