1126 static inline uint32_t REG_A6XX_CP_SCRATCH(uint32_t i0) { return 0x00000883 + 0x1*i0; }  in REG_A6XX_CP_SCRATCH()
1128 static inline uint32_t REG_A6XX_CP_SCRATCH_REG(uint32_t i0) { return 0x00000883 + 0x1*i0; }  in REG_A6XX_CP_SCRATCH_REG()
1130 static inline uint32_t REG_A6XX_CP_PROTECT(uint32_t i0) { return 0x00000850 + 0x1*i0; }  in REG_A6XX_CP_PROTECT()
1132 static inline uint32_t REG_A6XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000850 + 0x1*i0; }  in REG_A6XX_CP_PROTECT_REG()
1165 static inline uint32_t REG_A6XX_CP_PERFCTR_CP_SEL(uint32_t i0) { return 0x000008d0 + 0x1*i0; }  in REG_A6XX_CP_PERFCTR_CP_SEL()
1300 static inline uint32_t REG_A6XX_RBBM_PERFCTR_CP(uint32_t i0) { return 0x00000400 + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_CP()
1302 static inline uint32_t REG_A6XX_RBBM_PERFCTR_RBBM(uint32_t i0) { return 0x0000041c + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_RBBM()
1304 static inline uint32_t REG_A6XX_RBBM_PERFCTR_PC(uint32_t i0) { return 0x00000424 + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_PC()
1306 static inline uint32_t REG_A6XX_RBBM_PERFCTR_VFD(uint32_t i0) { return 0x00000434 + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_VFD()
1308 static inline uint32_t REG_A6XX_RBBM_PERFCTR_HLSQ(uint32_t i0) { return 0x00000444 + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_HLSQ()
1310 static inline uint32_t REG_A6XX_RBBM_PERFCTR_VPC(uint32_t i0) { return 0x00000450 + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_VPC()
1312 static inline uint32_t REG_A6XX_RBBM_PERFCTR_CCU(uint32_t i0) { return 0x0000045c + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_CCU()
1314 static inline uint32_t REG_A6XX_RBBM_PERFCTR_TSE(uint32_t i0) { return 0x00000466 + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_TSE()
1316 static inline uint32_t REG_A6XX_RBBM_PERFCTR_RAS(uint32_t i0) { return 0x0000046e + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_RAS()
1318 static inline uint32_t REG_A6XX_RBBM_PERFCTR_UCHE(uint32_t i0) { return 0x00000476 + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_UCHE()
1320 static inline uint32_t REG_A6XX_RBBM_PERFCTR_TP(uint32_t i0) { return 0x0000048e + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_TP()
1322 static inline uint32_t REG_A6XX_RBBM_PERFCTR_SP(uint32_t i0) { return 0x000004a6 + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_SP()
1324 static inline uint32_t REG_A6XX_RBBM_PERFCTR_RB(uint32_t i0) { return 0x000004d6 + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_RB()
1326 static inline uint32_t REG_A6XX_RBBM_PERFCTR_VSC(uint32_t i0) { return 0x000004e6 + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_VSC()
1328 static inline uint32_t REG_A6XX_RBBM_PERFCTR_LRZ(uint32_t i0) { return 0x000004ea + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_LRZ()
1330 static inline uint32_t REG_A6XX_RBBM_PERFCTR_CMP(uint32_t i0) { return 0x000004f2 + 0x2*i0; }  in REG_A6XX_RBBM_PERFCTR_CMP()
1346 static inline uint32_t REG_A6XX_RBBM_PERFCTR_RBBM_SEL(uint32_t i0) { return 0x00000507 + 0x1*i0; }  in REG_A6XX_RBBM_PERFCTR_RBBM_SEL()
1827 static inline uint32_t REG_A6XX_VSC_PERFCTR_VSC_SEL(uint32_t i0) { return 0x00000cd8 + 0x1*i0; }  in REG_A6XX_VSC_PERFCTR_VSC_SEL()
1869 static inline uint32_t REG_A6XX_UCHE_PERFCTR_UCHE_SEL(uint32_t i0) { return 0x00000e1c + 0x1*i0; }  in REG_A6XX_UCHE_PERFCTR_UCHE_SEL()
2032 static inline uint32_t REG_A6XX_VSC_PIPE_CONFIG(uint32_t i0) { return 0x00000c10 + 0x1*i0; }  in REG_A6XX_VSC_PIPE_CONFIG()
2034 static inline uint32_t REG_A6XX_VSC_PIPE_CONFIG_REG(uint32_t i0) { return 0x00000c10 + 0x1*i0; }  in REG_A6XX_VSC_PIPE_CONFIG_REG()
2072 static inline uint32_t REG_A6XX_VSC_STATE(uint32_t i0) { return 0x00000c38 + 0x1*i0; }  in REG_A6XX_VSC_STATE()
2074 static inline uint32_t REG_A6XX_VSC_STATE_REG(uint32_t i0) { return 0x00000c38 + 0x1*i0; }  in REG_A6XX_VSC_STATE_REG()
2076 static inline uint32_t REG_A6XX_VSC_PRIM_STRM_SIZE(uint32_t i0) { return 0x00000c58 + 0x1*i0; }  in REG_A6XX_VSC_PRIM_STRM_SIZE()
2078 static inline uint32_t REG_A6XX_VSC_PRIM_STRM_SIZE_REG(uint32_t i0) { return 0x00000c58 + 0x1*i0; }  in REG_A6XX_VSC_PRIM_STRM_SIZE_REG()
2080 static inline uint32_t REG_A6XX_VSC_DRAW_STRM_SIZE(uint32_t i0) { return 0x00000c78 + 0x1*i0; }  in REG_A6XX_VSC_DRAW_STRM_SIZE()
2082 static inline uint32_t REG_A6XX_VSC_DRAW_STRM_SIZE_REG(uint32_t i0) { return 0x00000c78 + 0x1*i0; }  in REG_A6XX_VSC_DRAW_STRM_SIZE_REG()
2168 static inline uint32_t REG_A6XX_GRAS_CL_VPORT(uint32_t i0) { return 0x00008010 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT()
2170 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_XOFFSET(uint32_t i0) { return 0x00008010 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT_XOFFSET()
2178 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_XSCALE(uint32_t i0) { return 0x00008011 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT_XSCALE()
2186 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_YOFFSET(uint32_t i0) { return 0x00008012 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT_YOFFSET()
2194 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_YSCALE(uint32_t i0) { return 0x00008013 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT_YSCALE()
2202 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_ZOFFSET(uint32_t i0) { return 0x00008014 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT_ZOFFSET()
2210 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_ZSCALE(uint32_t i0) { return 0x00008015 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT_ZSCALE()
2218 static inline uint32_t REG_A6XX_GRAS_CL_Z_CLAMP(uint32_t i0) { return 0x00008070 + 0x2*i0; }  in REG_A6XX_GRAS_CL_Z_CLAMP()
2220 static inline uint32_t REG_A6XX_GRAS_CL_Z_CLAMP_MIN(uint32_t i0) { return 0x00008070 + 0x2*i0; }  in REG_A6XX_GRAS_CL_Z_CLAMP_MIN()
2228 static inline uint32_t REG_A6XX_GRAS_CL_Z_CLAMP_MAX(uint32_t i0) { return 0x00008071 + 0x2*i0; }  in REG_A6XX_GRAS_CL_Z_CLAMP_MAX()
2587 static inline uint32_t REG_A6XX_GRAS_SC_SCREEN_SCISSOR(uint32_t i0) { return 0x000080b0 + 0x2*i0; }  in REG_A6XX_GRAS_SC_SCREEN_SCISSOR()
2589 static inline uint32_t REG_A6XX_GRAS_SC_SCREEN_SCISSOR_TL(uint32_t i0) { return 0x000080b0 + 0x2*i0…  in REG_A6XX_GRAS_SC_SCREEN_SCISSOR_TL()
2603 static inline uint32_t REG_A6XX_GRAS_SC_SCREEN_SCISSOR_BR(uint32_t i0) { return 0x000080b1 + 0x2*i0…  in REG_A6XX_GRAS_SC_SCREEN_SCISSOR_BR()
2617 static inline uint32_t REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR(uint32_t i0) { return 0x000080d0 + 0x2*i0;…  in REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR()
2619 static inline uint32_t REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL(uint32_t i0) { return 0x000080d0 + 0x2*…  in REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL()
2633 static inline uint32_t REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_BR(uint32_t i0) { return 0x000080d1 + 0x2*…  in REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_BR()
2885 static inline uint32_t REG_A6XX_GRAS_PERFCTR_TSE_SEL(uint32_t i0) { return 0x00008610 + 0x1*i0; }  in REG_A6XX_GRAS_PERFCTR_TSE_SEL()
2887 static inline uint32_t REG_A6XX_GRAS_PERFCTR_RAS_SEL(uint32_t i0) { return 0x00008614 + 0x1*i0; }  in REG_A6XX_GRAS_PERFCTR_RAS_SEL()
2889 static inline uint32_t REG_A6XX_GRAS_PERFCTR_LRZ_SEL(uint32_t i0) { return 0x00008618 + 0x1*i0; }  in REG_A6XX_GRAS_PERFCTR_LRZ_SEL()
3267 static inline uint32_t REG_A6XX_RB_MRT(uint32_t i0) { return 0x00008820 + 0x8*i0; }  in REG_A6XX_RB_MRT()
3269 static inline uint32_t REG_A6XX_RB_MRT_CONTROL(uint32_t i0) { return 0x00008820 + 0x8*i0; }  in REG_A6XX_RB_MRT_CONTROL()
3286 static inline uint32_t REG_A6XX_RB_MRT_BLEND_CONTROL(uint32_t i0) { return 0x00008821 + 0x8*i0; }  in REG_A6XX_RB_MRT_BLEND_CONTROL()
3324 static inline uint32_t REG_A6XX_RB_MRT_BUF_INFO(uint32_t i0) { return 0x00008822 + 0x8*i0; }  in REG_A6XX_RB_MRT_BUF_INFO()
3350 static inline uint32_t REG_A6XX_RB_MRT_PITCH(uint32_t i0) { return 0x00008823 + 0x8*i0; }  in REG_A6XX_RB_MRT_PITCH()
3358 static inline uint32_t REG_A6XX_RB_MRT_ARRAY_PITCH(uint32_t i0) { return 0x00008824 + 0x8*i0; }  in REG_A6XX_RB_MRT_ARRAY_PITCH()
3366 static inline uint32_t REG_A6XX_RB_MRT_BASE(uint32_t i0) { return 0x00008825 + 0x8*i0; }  in REG_A6XX_RB_MRT_BASE()
3374 static inline uint32_t REG_A6XX_RB_MRT_BASE_GMEM(uint32_t i0) { return 0x00008827 + 0x8*i0; }  in REG_A6XX_RB_MRT_BASE_GMEM()
3944 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER(uint32_t i0) { return 0x00008903 + 0x3*i0; }  in REG_A6XX_RB_MRT_FLAG_BUFFER()
3946 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR(uint32_t i0) { return 0x00008903 + 0x3*i0; }  in REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR()
3954 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t i0) { return 0x00008905 + 0x3*i0;…  in REG_A6XX_RB_MRT_FLAG_BUFFER_PITCH()
4202 static inline uint32_t REG_A6XX_RB_PERFCTR_RB_SEL(uint32_t i0) { return 0x00008e10 + 0x1*i0; }  in REG_A6XX_RB_PERFCTR_RB_SEL()
4204 static inline uint32_t REG_A6XX_RB_PERFCTR_CCU_SEL(uint32_t i0) { return 0x00008e18 + 0x1*i0; }  in REG_A6XX_RB_PERFCTR_CCU_SEL()
4208 static inline uint32_t REG_A6XX_RB_PERFCTR_CMP_SEL(uint32_t i0) { return 0x00008e2c + 0x1*i0; }  in REG_A6XX_RB_PERFCTR_CMP_SEL()
4346 static inline uint32_t REG_A6XX_VPC_VARYING_INTERP(uint32_t i0) { return 0x00009200 + 0x1*i0; }  in REG_A6XX_VPC_VARYING_INTERP()
4348 static inline uint32_t REG_A6XX_VPC_VARYING_INTERP_MODE(uint32_t i0) { return 0x00009200 + 0x1*i0; }  in REG_A6XX_VPC_VARYING_INTERP_MODE()
4350 static inline uint32_t REG_A6XX_VPC_VARYING_PS_REPL(uint32_t i0) { return 0x00009208 + 0x1*i0; }  in REG_A6XX_VPC_VARYING_PS_REPL()
4352 static inline uint32_t REG_A6XX_VPC_VARYING_PS_REPL_MODE(uint32_t i0) { return 0x00009208 + 0x1*i0;…  in REG_A6XX_VPC_VARYING_PS_REPL_MODE()
4358 static inline uint32_t REG_A6XX_VPC_VAR(uint32_t i0) { return 0x00009212 + 0x1*i0; }  in REG_A6XX_VPC_VAR()
4360 static inline uint32_t REG_A6XX_VPC_VAR_DISABLE(uint32_t i0) { return 0x00009212 + 0x1*i0; }  in REG_A6XX_VPC_VAR_DISABLE()
4407 static inline uint32_t REG_A6XX_VPC_SO(uint32_t i0) { return 0x0000921a + 0x7*i0; }  in REG_A6XX_VPC_SO()
4409 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_BASE(uint32_t i0) { return 0x0000921a + 0x7*i0; }  in REG_A6XX_VPC_SO_BUFFER_BASE()
4417 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_SIZE(uint32_t i0) { return 0x0000921c + 0x7*i0; }  in REG_A6XX_VPC_SO_BUFFER_SIZE()
4425 static inline uint32_t REG_A6XX_VPC_SO_NCOMP(uint32_t i0) { return 0x0000921d + 0x7*i0; }  in REG_A6XX_VPC_SO_NCOMP()
4427 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_OFFSET(uint32_t i0) { return 0x0000921e + 0x7*i0; }  in REG_A6XX_VPC_SO_BUFFER_OFFSET()
4435 static inline uint32_t REG_A6XX_VPC_SO_FLUSH_BASE(uint32_t i0) { return 0x0000921f + 0x7*i0; }  in REG_A6XX_VPC_SO_FLUSH_BASE()
4590 static inline uint32_t REG_A6XX_VPC_PERFCTR_VPC_SEL(uint32_t i0) { return 0x00009604 + 0x1*i0; }  in REG_A6XX_VPC_PERFCTR_VPC_SEL()
4919 static inline uint32_t REG_A6XX_PC_PERFCTR_PC_SEL(uint32_t i0) { return 0x00009e34 + 0x1*i0; }  in REG_A6XX_PC_PERFCTR_PC_SEL()
5054 static inline uint32_t REG_A6XX_VFD_FETCH(uint32_t i0) { return 0x0000a010 + 0x4*i0; }  in REG_A6XX_VFD_FETCH()
5056 static inline uint32_t REG_A6XX_VFD_FETCH_BASE(uint32_t i0) { return 0x0000a010 + 0x4*i0; }  in REG_A6XX_VFD_FETCH_BASE()
5064 static inline uint32_t REG_A6XX_VFD_FETCH_SIZE(uint32_t i0) { return 0x0000a012 + 0x4*i0; }  in REG_A6XX_VFD_FETCH_SIZE()
5066 static inline uint32_t REG_A6XX_VFD_FETCH_STRIDE(uint32_t i0) { return 0x0000a013 + 0x4*i0; }  in REG_A6XX_VFD_FETCH_STRIDE()
5068 static inline uint32_t REG_A6XX_VFD_DECODE(uint32_t i0) { return 0x0000a090 + 0x2*i0; }  in REG_A6XX_VFD_DECODE()
5070 static inline uint32_t REG_A6XX_VFD_DECODE_INSTR(uint32_t i0) { return 0x0000a090 + 0x2*i0; }  in REG_A6XX_VFD_DECODE_INSTR()
5099 static inline uint32_t REG_A6XX_VFD_DECODE_STEP_RATE(uint32_t i0) { return 0x0000a091 + 0x2*i0; }  in REG_A6XX_VFD_DECODE_STEP_RATE()
5101 static inline uint32_t REG_A6XX_VFD_DEST_CNTL(uint32_t i0) { return 0x0000a0d0 + 0x1*i0; }  in REG_A6XX_VFD_DEST_CNTL()
5103 static inline uint32_t REG_A6XX_VFD_DEST_CNTL_INSTR(uint32_t i0) { return 0x0000a0d0 + 0x1*i0; }  in REG_A6XX_VFD_DEST_CNTL_INSTR()
5121 static inline uint32_t REG_A6XX_VFD_PERFCTR_VFD_SEL(uint32_t i0) { return 0x0000a610 + 0x1*i0; }  in REG_A6XX_VFD_PERFCTR_VFD_SEL()
5168 static inline uint32_t REG_A6XX_SP_VS_OUT(uint32_t i0) { return 0x0000a803 + 0x1*i0; }  in REG_A6XX_SP_VS_OUT()
5170 static inline uint32_t REG_A6XX_SP_VS_OUT_REG(uint32_t i0) { return 0x0000a803 + 0x1*i0; }  in REG_A6XX_SP_VS_OUT_REG()
5196 static inline uint32_t REG_A6XX_SP_VS_VPC_DST(uint32_t i0) { return 0x0000a813 + 0x1*i0; }  in REG_A6XX_SP_VS_VPC_DST()
5198 static inline uint32_t REG_A6XX_SP_VS_VPC_DST_REG(uint32_t i0) { return 0x0000a813 + 0x1*i0; }  in REG_A6XX_SP_VS_VPC_DST_REG()
5456 static inline uint32_t REG_A6XX_SP_DS_OUT(uint32_t i0) { return 0x0000a843 + 0x1*i0; }  in REG_A6XX_SP_DS_OUT()
5458 static inline uint32_t REG_A6XX_SP_DS_OUT_REG(uint32_t i0) { return 0x0000a843 + 0x1*i0; }  in REG_A6XX_SP_DS_OUT_REG()
5484 static inline uint32_t REG_A6XX_SP_DS_VPC_DST(uint32_t i0) { return 0x0000a853 + 0x1*i0; }  in REG_A6XX_SP_DS_VPC_DST()
5486 static inline uint32_t REG_A6XX_SP_DS_VPC_DST_REG(uint32_t i0) { return 0x0000a853 + 0x1*i0; }  in REG_A6XX_SP_DS_VPC_DST_REG()
5636 static inline uint32_t REG_A6XX_SP_GS_OUT(uint32_t i0) { return 0x0000a874 + 0x1*i0; }  in REG_A6XX_SP_GS_OUT()
5638 static inline uint32_t REG_A6XX_SP_GS_OUT_REG(uint32_t i0) { return 0x0000a874 + 0x1*i0; }  in REG_A6XX_SP_GS_OUT_REG()
5664 static inline uint32_t REG_A6XX_SP_GS_VPC_DST(uint32_t i0) { return 0x0000a884 + 0x1*i0; }  in REG_A6XX_SP_GS_VPC_DST()
5666 static inline uint32_t REG_A6XX_SP_GS_VPC_DST_REG(uint32_t i0) { return 0x0000a884 + 0x1*i0; }  in REG_A6XX_SP_GS_VPC_DST_REG()
6023 static inline uint32_t REG_A6XX_SP_FS_OUTPUT(uint32_t i0) { return 0x0000a98e + 0x1*i0; }  in REG_A6XX_SP_FS_OUTPUT()
6025 static inline uint32_t REG_A6XX_SP_FS_OUTPUT_REG(uint32_t i0) { return 0x0000a98e + 0x1*i0; }  in REG_A6XX_SP_FS_OUTPUT_REG()
6034 static inline uint32_t REG_A6XX_SP_FS_MRT(uint32_t i0) { return 0x0000a996 + 0x1*i0; }  in REG_A6XX_SP_FS_MRT()
6036 static inline uint32_t REG_A6XX_SP_FS_MRT_REG(uint32_t i0) { return 0x0000a996 + 0x1*i0; }  in REG_A6XX_SP_FS_MRT_REG()
6068 static inline uint32_t REG_A6XX_SP_FS_PREFETCH(uint32_t i0) { return 0x0000a99f + 0x1*i0; }  in REG_A6XX_SP_FS_PREFETCH()
6070 static inline uint32_t REG_A6XX_SP_FS_PREFETCH_CMD(uint32_t i0) { return 0x0000a99f + 0x1*i0; }  in REG_A6XX_SP_FS_PREFETCH_CMD()
6109 static inline uint32_t REG_A6XX_SP_FS_BINDLESS_PREFETCH(uint32_t i0) { return 0x0000a9a3 + 0x1*i0; }  in REG_A6XX_SP_FS_BINDLESS_PREFETCH()
6111 static inline uint32_t REG_A6XX_SP_FS_BINDLESS_PREFETCH_CMD(uint32_t i0) { return 0x0000a9a3 + 0x1*…  in REG_A6XX_SP_FS_BINDLESS_PREFETCH_CMD()
6338 static inline uint32_t REG_A6XX_SP_CS_BINDLESS_BASE(uint32_t i0) { return 0x0000a9e8 + 0x2*i0; }  in REG_A6XX_SP_CS_BINDLESS_BASE()
6340 static inline uint32_t REG_A6XX_SP_CS_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000a9e8 + 0x2*i0;…  in REG_A6XX_SP_CS_BINDLESS_BASE_ADDR()
6389 static inline uint32_t REG_A6XX_SP_BINDLESS_BASE(uint32_t i0) { return 0x0000ab10 + 0x2*i0; }  in REG_A6XX_SP_BINDLESS_BASE()
6391 static inline uint32_t REG_A6XX_SP_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000ab10 + 0x2*i0; }  in REG_A6XX_SP_BINDLESS_BASE_ADDR()
6440 static inline uint32_t REG_A6XX_SP_PERFCTR_SP_SEL(uint32_t i0) { return 0x0000ae10 + 0x1*i0; }  in REG_A6XX_SP_PERFCTR_SP_SEL()
6803 static inline uint32_t REG_A6XX_TPL1_PERFCTR_TP_SEL(uint32_t i0) { return 0x0000b610 + 0x1*i0; }  in REG_A6XX_TPL1_PERFCTR_TP_SEL()
7107 static inline uint32_t REG_A6XX_HLSQ_CS_BINDLESS_BASE(uint32_t i0) { return 0x0000b9c0 + 0x2*i0; }  in REG_A6XX_HLSQ_CS_BINDLESS_BASE()
7109 static inline uint32_t REG_A6XX_HLSQ_CS_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000b9c0 + 0x2*i…  in REG_A6XX_HLSQ_CS_BINDLESS_BASE_ADDR()
7187 static inline uint32_t REG_A6XX_HLSQ_BINDLESS_BASE(uint32_t i0) { return 0x0000bb20 + 0x2*i0; }  in REG_A6XX_HLSQ_BINDLESS_BASE()
7189 static inline uint32_t REG_A6XX_HLSQ_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000bb20 + 0x2*i0; }  in REG_A6XX_HLSQ_BINDLESS_BASE_ADDR()
7215 static inline uint32_t REG_A6XX_HLSQ_PERFCTR_HLSQ_SEL(uint32_t i0) { return 0x0000be10 + 0x1*i0; }  in REG_A6XX_HLSQ_PERFCTR_HLSQ_SEL()