845 static inline uint32_t A4XX_CGC_HLSQ_EARLY_CYC(uint32_t val)  in A4XX_CGC_HLSQ_EARLY_CYC()  argument
847 	return ((val) << A4XX_CGC_HLSQ_EARLY_CYC__SHIFT) & A4XX_CGC_HLSQ_EARLY_CYC__MASK;  in A4XX_CGC_HLSQ_EARLY_CYC()
902 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val)  in A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()  argument
904 …return ((val) << A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__SHIFT) & A4XX_RB_FRAME_BUFFER_DIMENSION_WID…  in A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()
908 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val)  in A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()  argument
910 …return ((val) << A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__SHIFT) & A4XX_RB_FRAME_BUFFER_DIMENSION_HE…  in A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()
924 static inline uint32_t A4XX_RB_MODE_CONTROL_WIDTH(uint32_t val)  in A4XX_RB_MODE_CONTROL_WIDTH()  argument
926 	return ((val >> 5) << A4XX_RB_MODE_CONTROL_WIDTH__SHIFT) & A4XX_RB_MODE_CONTROL_WIDTH__MASK;  in A4XX_RB_MODE_CONTROL_WIDTH()
930 static inline uint32_t A4XX_RB_MODE_CONTROL_HEIGHT(uint32_t val)  in A4XX_RB_MODE_CONTROL_HEIGHT()  argument
932 	return ((val >> 5) << A4XX_RB_MODE_CONTROL_HEIGHT__SHIFT) & A4XX_RB_MODE_CONTROL_HEIGHT__MASK;  in A4XX_RB_MODE_CONTROL_HEIGHT()
944 static inline uint32_t A4XX_RB_MSAA_CONTROL_SAMPLES(uint32_t val)  in A4XX_RB_MSAA_CONTROL_SAMPLES()  argument
946 	return ((val) << A4XX_RB_MSAA_CONTROL_SAMPLES__SHIFT) & A4XX_RB_MSAA_CONTROL_SAMPLES__MASK;  in A4XX_RB_MSAA_CONTROL_SAMPLES()
952 static inline uint32_t A4XX_RB_RENDER_CONTROL2_COORD_MASK(uint32_t val)  in A4XX_RB_RENDER_CONTROL2_COORD_MASK()  argument
954 …return ((val) << A4XX_RB_RENDER_CONTROL2_COORD_MASK__SHIFT) & A4XX_RB_RENDER_CONTROL2_COORD_MASK__…  in A4XX_RB_RENDER_CONTROL2_COORD_MASK()
961 static inline uint32_t A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES(uint32_t val)  in A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES()  argument
963 …return ((val) << A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES__SHIFT) & A4XX_RB_RENDER_CONTROL2_MSAA_SAMPL…  in A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES()
980 static inline uint32_t A4XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val)  in A4XX_RB_MRT_CONTROL_ROP_CODE()  argument
982 	return ((val) << A4XX_RB_MRT_CONTROL_ROP_CODE__SHIFT) & A4XX_RB_MRT_CONTROL_ROP_CODE__MASK;  in A4XX_RB_MRT_CONTROL_ROP_CODE()
986 static inline uint32_t A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val)  in A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE()  argument
988 …return ((val) << A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) & A4XX_RB_MRT_CONTROL_COMPONENT_ENAB…  in A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
994 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a4xx_color_fmt val)  in A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT()  argument
996 …return ((val) << A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MA…  in A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT()
1000 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a4xx_tile_mode val)  in A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()  argument
1002 …return ((val) << A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MO…  in A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()
1006 static inline uint32_t A4XX_RB_MRT_BUF_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A4XX_RB_MRT_BUF_INFO_DITHER_MODE()  argument
1008 	return ((val) << A4XX_RB_MRT_BUF_INFO_DITHER_MODE__SHIFT) & A4XX_RB_MRT_BUF_INFO_DITHER_MODE__MASK;  in A4XX_RB_MRT_BUF_INFO_DITHER_MODE()
1012 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A4XX_RB_MRT_BUF_INFO_COLOR_SWAP()  argument
1014 	return ((val) << A4XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK;  in A4XX_RB_MRT_BUF_INFO_COLOR_SWAP()
1019 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(uint32_t val)  in A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH()  argument
1021 …return ((val >> 4) << A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_BU…  in A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH()
1029 static inline uint32_t A4XX_RB_MRT_CONTROL3_STRIDE(uint32_t val)  in A4XX_RB_MRT_CONTROL3_STRIDE()  argument
1031 	return ((val) << A4XX_RB_MRT_CONTROL3_STRIDE__SHIFT) & A4XX_RB_MRT_CONTROL3_STRIDE__MASK;  in A4XX_RB_MRT_CONTROL3_STRIDE()
1037 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()  argument
1039 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_RGB_…  in A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()
1043 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()  argument
1045 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_RG…  in A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()
1049 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()  argument
1051 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_RGB…  in A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()
1055 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()  argument
1057 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_AL…  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()
1061 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()  argument
1063 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_…  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()
1067 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()  argument
1069 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_A…  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()
1075 static inline uint32_t A4XX_RB_BLEND_RED_UINT(uint32_t val)  in A4XX_RB_BLEND_RED_UINT()  argument
1077 	return ((val) << A4XX_RB_BLEND_RED_UINT__SHIFT) & A4XX_RB_BLEND_RED_UINT__MASK;  in A4XX_RB_BLEND_RED_UINT()
1081 static inline uint32_t A4XX_RB_BLEND_RED_SINT(uint32_t val)  in A4XX_RB_BLEND_RED_SINT()  argument
1083 	return ((val) << A4XX_RB_BLEND_RED_SINT__SHIFT) & A4XX_RB_BLEND_RED_SINT__MASK;  in A4XX_RB_BLEND_RED_SINT()
1087 static inline uint32_t A4XX_RB_BLEND_RED_FLOAT(float val)  in A4XX_RB_BLEND_RED_FLOAT()  argument
1089 …return ((_mesa_float_to_half(val)) << A4XX_RB_BLEND_RED_FLOAT__SHIFT) & A4XX_RB_BLEND_RED_FLOAT__M…  in A4XX_RB_BLEND_RED_FLOAT()
1095 static inline uint32_t A4XX_RB_BLEND_RED_F32(float val)  in A4XX_RB_BLEND_RED_F32()  argument
1097 	return ((fui(val)) << A4XX_RB_BLEND_RED_F32__SHIFT) & A4XX_RB_BLEND_RED_F32__MASK;  in A4XX_RB_BLEND_RED_F32()
1103 static inline uint32_t A4XX_RB_BLEND_GREEN_UINT(uint32_t val)  in A4XX_RB_BLEND_GREEN_UINT()  argument
1105 	return ((val) << A4XX_RB_BLEND_GREEN_UINT__SHIFT) & A4XX_RB_BLEND_GREEN_UINT__MASK;  in A4XX_RB_BLEND_GREEN_UINT()
1109 static inline uint32_t A4XX_RB_BLEND_GREEN_SINT(uint32_t val)  in A4XX_RB_BLEND_GREEN_SINT()  argument
1111 	return ((val) << A4XX_RB_BLEND_GREEN_SINT__SHIFT) & A4XX_RB_BLEND_GREEN_SINT__MASK;  in A4XX_RB_BLEND_GREEN_SINT()
1115 static inline uint32_t A4XX_RB_BLEND_GREEN_FLOAT(float val)  in A4XX_RB_BLEND_GREEN_FLOAT()  argument
1117 …return ((_mesa_float_to_half(val)) << A4XX_RB_BLEND_GREEN_FLOAT__SHIFT) & A4XX_RB_BLEND_GREEN_FLOA…  in A4XX_RB_BLEND_GREEN_FLOAT()
1123 static inline uint32_t A4XX_RB_BLEND_GREEN_F32(float val)  in A4XX_RB_BLEND_GREEN_F32()  argument
1125 	return ((fui(val)) << A4XX_RB_BLEND_GREEN_F32__SHIFT) & A4XX_RB_BLEND_GREEN_F32__MASK;  in A4XX_RB_BLEND_GREEN_F32()
1131 static inline uint32_t A4XX_RB_BLEND_BLUE_UINT(uint32_t val)  in A4XX_RB_BLEND_BLUE_UINT()  argument
1133 	return ((val) << A4XX_RB_BLEND_BLUE_UINT__SHIFT) & A4XX_RB_BLEND_BLUE_UINT__MASK;  in A4XX_RB_BLEND_BLUE_UINT()
1137 static inline uint32_t A4XX_RB_BLEND_BLUE_SINT(uint32_t val)  in A4XX_RB_BLEND_BLUE_SINT()  argument
1139 	return ((val) << A4XX_RB_BLEND_BLUE_SINT__SHIFT) & A4XX_RB_BLEND_BLUE_SINT__MASK;  in A4XX_RB_BLEND_BLUE_SINT()
1143 static inline uint32_t A4XX_RB_BLEND_BLUE_FLOAT(float val)  in A4XX_RB_BLEND_BLUE_FLOAT()  argument
1145 …return ((_mesa_float_to_half(val)) << A4XX_RB_BLEND_BLUE_FLOAT__SHIFT) & A4XX_RB_BLEND_BLUE_FLOAT_…  in A4XX_RB_BLEND_BLUE_FLOAT()
1151 static inline uint32_t A4XX_RB_BLEND_BLUE_F32(float val)  in A4XX_RB_BLEND_BLUE_F32()  argument
1153 	return ((fui(val)) << A4XX_RB_BLEND_BLUE_F32__SHIFT) & A4XX_RB_BLEND_BLUE_F32__MASK;  in A4XX_RB_BLEND_BLUE_F32()
1159 static inline uint32_t A4XX_RB_BLEND_ALPHA_UINT(uint32_t val)  in A4XX_RB_BLEND_ALPHA_UINT()  argument
1161 	return ((val) << A4XX_RB_BLEND_ALPHA_UINT__SHIFT) & A4XX_RB_BLEND_ALPHA_UINT__MASK;  in A4XX_RB_BLEND_ALPHA_UINT()
1165 static inline uint32_t A4XX_RB_BLEND_ALPHA_SINT(uint32_t val)  in A4XX_RB_BLEND_ALPHA_SINT()  argument
1167 	return ((val) << A4XX_RB_BLEND_ALPHA_SINT__SHIFT) & A4XX_RB_BLEND_ALPHA_SINT__MASK;  in A4XX_RB_BLEND_ALPHA_SINT()
1171 static inline uint32_t A4XX_RB_BLEND_ALPHA_FLOAT(float val)  in A4XX_RB_BLEND_ALPHA_FLOAT()  argument
1173 …return ((_mesa_float_to_half(val)) << A4XX_RB_BLEND_ALPHA_FLOAT__SHIFT) & A4XX_RB_BLEND_ALPHA_FLOA…  in A4XX_RB_BLEND_ALPHA_FLOAT()
1179 static inline uint32_t A4XX_RB_BLEND_ALPHA_F32(float val)  in A4XX_RB_BLEND_ALPHA_F32()  argument
1181 	return ((fui(val)) << A4XX_RB_BLEND_ALPHA_F32__SHIFT) & A4XX_RB_BLEND_ALPHA_F32__MASK;  in A4XX_RB_BLEND_ALPHA_F32()
1187 static inline uint32_t A4XX_RB_ALPHA_CONTROL_ALPHA_REF(uint32_t val)  in A4XX_RB_ALPHA_CONTROL_ALPHA_REF()  argument
1189 	return ((val) << A4XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT) & A4XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK;  in A4XX_RB_ALPHA_CONTROL_ALPHA_REF()
1194 static inline uint32_t A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val)  in A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()  argument
1196 …return ((val) << A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT) & A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_…  in A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()
1202 static inline uint32_t A4XX_RB_FS_OUTPUT_ENABLE_BLEND(uint32_t val)  in A4XX_RB_FS_OUTPUT_ENABLE_BLEND()  argument
1204 	return ((val) << A4XX_RB_FS_OUTPUT_ENABLE_BLEND__SHIFT) & A4XX_RB_FS_OUTPUT_ENABLE_BLEND__MASK;  in A4XX_RB_FS_OUTPUT_ENABLE_BLEND()
1209 static inline uint32_t A4XX_RB_FS_OUTPUT_SAMPLE_MASK(uint32_t val)  in A4XX_RB_FS_OUTPUT_SAMPLE_MASK()  argument
1211 	return ((val) << A4XX_RB_FS_OUTPUT_SAMPLE_MASK__SHIFT) & A4XX_RB_FS_OUTPUT_SAMPLE_MASK__MASK;  in A4XX_RB_FS_OUTPUT_SAMPLE_MASK()
1218 static inline uint32_t A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR(uint32_t val)  in A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR()  argument
1220 …return ((val >> 2) << A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR__SHIFT) & A4XX_RB_SAMPLE_COUNT_CONTROL_ADD…  in A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR()
1226 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT0(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT0()  argument
1228 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT0__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT0__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT0()
1232 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT1(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT1()  argument
1234 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT1__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT1__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT1()
1238 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT2(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT2()  argument
1240 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT2__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT2__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT2()
1244 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT3(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT3()  argument
1246 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT3__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT3__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT3()
1250 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT4(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT4()  argument
1252 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT4__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT4__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT4()
1256 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT5(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT5()  argument
1258 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT5__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT5__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT5()
1262 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT6(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT6()  argument
1264 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT6__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT6__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT6()
1268 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT7(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT7()  argument
1270 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT7__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT7__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT7()
1276 static inline uint32_t A4XX_RB_COPY_CONTROL_MSAA_RESOLVE(enum a3xx_msaa_samples val)  in A4XX_RB_COPY_CONTROL_MSAA_RESOLVE()  argument
1278 …return ((val) << A4XX_RB_COPY_CONTROL_MSAA_RESOLVE__SHIFT) & A4XX_RB_COPY_CONTROL_MSAA_RESOLVE__MA…  in A4XX_RB_COPY_CONTROL_MSAA_RESOLVE()
1282 static inline uint32_t A4XX_RB_COPY_CONTROL_MODE(enum adreno_rb_copy_control_mode val)  in A4XX_RB_COPY_CONTROL_MODE()  argument
1284 	return ((val) << A4XX_RB_COPY_CONTROL_MODE__SHIFT) & A4XX_RB_COPY_CONTROL_MODE__MASK;  in A4XX_RB_COPY_CONTROL_MODE()
1288 static inline uint32_t A4XX_RB_COPY_CONTROL_FASTCLEAR(uint32_t val)  in A4XX_RB_COPY_CONTROL_FASTCLEAR()  argument
1290 	return ((val) << A4XX_RB_COPY_CONTROL_FASTCLEAR__SHIFT) & A4XX_RB_COPY_CONTROL_FASTCLEAR__MASK;  in A4XX_RB_COPY_CONTROL_FASTCLEAR()
1294 static inline uint32_t A4XX_RB_COPY_CONTROL_GMEM_BASE(uint32_t val)  in A4XX_RB_COPY_CONTROL_GMEM_BASE()  argument
1296 …return ((val >> 14) << A4XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT) & A4XX_RB_COPY_CONTROL_GMEM_BASE__MA…  in A4XX_RB_COPY_CONTROL_GMEM_BASE()
1302 static inline uint32_t A4XX_RB_COPY_DEST_BASE_BASE(uint32_t val)  in A4XX_RB_COPY_DEST_BASE_BASE()  argument
1304 	return ((val >> 5) << A4XX_RB_COPY_DEST_BASE_BASE__SHIFT) & A4XX_RB_COPY_DEST_BASE_BASE__MASK;  in A4XX_RB_COPY_DEST_BASE_BASE()
1310 static inline uint32_t A4XX_RB_COPY_DEST_PITCH_PITCH(uint32_t val)  in A4XX_RB_COPY_DEST_PITCH_PITCH()  argument
1312 	return ((val >> 5) << A4XX_RB_COPY_DEST_PITCH_PITCH__SHIFT) & A4XX_RB_COPY_DEST_PITCH_PITCH__MASK;  in A4XX_RB_COPY_DEST_PITCH_PITCH()
1318 static inline uint32_t A4XX_RB_COPY_DEST_INFO_FORMAT(enum a4xx_color_fmt val)  in A4XX_RB_COPY_DEST_INFO_FORMAT()  argument
1320 	return ((val) << A4XX_RB_COPY_DEST_INFO_FORMAT__SHIFT) & A4XX_RB_COPY_DEST_INFO_FORMAT__MASK;  in A4XX_RB_COPY_DEST_INFO_FORMAT()
1324 static inline uint32_t A4XX_RB_COPY_DEST_INFO_SWAP(enum a3xx_color_swap val)  in A4XX_RB_COPY_DEST_INFO_SWAP()  argument
1326 	return ((val) << A4XX_RB_COPY_DEST_INFO_SWAP__SHIFT) & A4XX_RB_COPY_DEST_INFO_SWAP__MASK;  in A4XX_RB_COPY_DEST_INFO_SWAP()
1330 static inline uint32_t A4XX_RB_COPY_DEST_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A4XX_RB_COPY_DEST_INFO_DITHER_MODE()  argument
1332 …return ((val) << A4XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT) & A4XX_RB_COPY_DEST_INFO_DITHER_MODE__…  in A4XX_RB_COPY_DEST_INFO_DITHER_MODE()
1336 static inline uint32_t A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE(uint32_t val)  in A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE()  argument
1338 …return ((val) << A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__SHIFT) & A4XX_RB_COPY_DEST_INFO_COMPONEN…  in A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE()
1342 static inline uint32_t A4XX_RB_COPY_DEST_INFO_ENDIAN(enum adreno_rb_surface_endian val)  in A4XX_RB_COPY_DEST_INFO_ENDIAN()  argument
1344 	return ((val) << A4XX_RB_COPY_DEST_INFO_ENDIAN__SHIFT) & A4XX_RB_COPY_DEST_INFO_ENDIAN__MASK;  in A4XX_RB_COPY_DEST_INFO_ENDIAN()
1348 static inline uint32_t A4XX_RB_COPY_DEST_INFO_TILE(enum a4xx_tile_mode val)  in A4XX_RB_COPY_DEST_INFO_TILE()  argument
1350 	return ((val) << A4XX_RB_COPY_DEST_INFO_TILE__SHIFT) & A4XX_RB_COPY_DEST_INFO_TILE__MASK;  in A4XX_RB_COPY_DEST_INFO_TILE()
1356 static inline uint32_t A4XX_RB_FS_OUTPUT_REG_MRT(uint32_t val)  in A4XX_RB_FS_OUTPUT_REG_MRT()  argument
1358 	return ((val) << A4XX_RB_FS_OUTPUT_REG_MRT__SHIFT) & A4XX_RB_FS_OUTPUT_REG_MRT__MASK;  in A4XX_RB_FS_OUTPUT_REG_MRT()
1368 static inline uint32_t A4XX_RB_DEPTH_CONTROL_ZFUNC(enum adreno_compare_func val)  in A4XX_RB_DEPTH_CONTROL_ZFUNC()  argument
1370 	return ((val) << A4XX_RB_DEPTH_CONTROL_ZFUNC__SHIFT) & A4XX_RB_DEPTH_CONTROL_ZFUNC__MASK;  in A4XX_RB_DEPTH_CONTROL_ZFUNC()
1382 static inline uint32_t A4XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum a4xx_depth_format val)  in A4XX_RB_DEPTH_INFO_DEPTH_FORMAT()  argument
1384 	return ((val) << A4XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT) & A4XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK;  in A4XX_RB_DEPTH_INFO_DEPTH_FORMAT()
1388 static inline uint32_t A4XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val)  in A4XX_RB_DEPTH_INFO_DEPTH_BASE()  argument
1390 	return ((val >> 12) << A4XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) & A4XX_RB_DEPTH_INFO_DEPTH_BASE__MASK;  in A4XX_RB_DEPTH_INFO_DEPTH_BASE()
1396 static inline uint32_t A4XX_RB_DEPTH_PITCH(uint32_t val)  in A4XX_RB_DEPTH_PITCH()  argument
1398 	return ((val >> 5) << A4XX_RB_DEPTH_PITCH__SHIFT) & A4XX_RB_DEPTH_PITCH__MASK;  in A4XX_RB_DEPTH_PITCH()
1404 static inline uint32_t A4XX_RB_DEPTH_PITCH2(uint32_t val)  in A4XX_RB_DEPTH_PITCH2()  argument
1406 	return ((val >> 5) << A4XX_RB_DEPTH_PITCH2__SHIFT) & A4XX_RB_DEPTH_PITCH2__MASK;  in A4XX_RB_DEPTH_PITCH2()
1415 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val)  in A4XX_RB_STENCIL_CONTROL_FUNC()  argument
1417 	return ((val) << A4XX_RB_STENCIL_CONTROL_FUNC__SHIFT) & A4XX_RB_STENCIL_CONTROL_FUNC__MASK;  in A4XX_RB_STENCIL_CONTROL_FUNC()
1421 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_FAIL()  argument
1423 	return ((val) << A4XX_RB_STENCIL_CONTROL_FAIL__SHIFT) & A4XX_RB_STENCIL_CONTROL_FAIL__MASK;  in A4XX_RB_STENCIL_CONTROL_FAIL()
1427 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZPASS()  argument
1429 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZPASS__MASK;  in A4XX_RB_STENCIL_CONTROL_ZPASS()
1433 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZFAIL()  argument
1435 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZFAIL__MASK;  in A4XX_RB_STENCIL_CONTROL_ZFAIL()
1439 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val)  in A4XX_RB_STENCIL_CONTROL_FUNC_BF()  argument
1441 	return ((val) << A4XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_FUNC_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_FUNC_BF()
1445 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_FAIL_BF()  argument
1447 	return ((val) << A4XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_FAIL_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_FAIL_BF()
1451 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZPASS_BF()  argument
1453 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_ZPASS_BF()
1457 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZFAIL_BF()  argument
1459 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_ZFAIL_BF()
1469 static inline uint32_t A4XX_RB_STENCIL_INFO_STENCIL_BASE(uint32_t val)  in A4XX_RB_STENCIL_INFO_STENCIL_BASE()  argument
1471 …return ((val >> 12) << A4XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT) & A4XX_RB_STENCIL_INFO_STENCIL_BA…  in A4XX_RB_STENCIL_INFO_STENCIL_BASE()
1477 static inline uint32_t A4XX_RB_STENCIL_PITCH(uint32_t val)  in A4XX_RB_STENCIL_PITCH()  argument
1479 	return ((val >> 5) << A4XX_RB_STENCIL_PITCH__SHIFT) & A4XX_RB_STENCIL_PITCH__MASK;  in A4XX_RB_STENCIL_PITCH()
1485 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILREF()  argument
1487 …return ((val) << A4XX_RB_STENCILREFMASK_STENCILREF__SHIFT) & A4XX_RB_STENCILREFMASK_STENCILREF__MA…  in A4XX_RB_STENCILREFMASK_STENCILREF()
1491 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILMASK()  argument
1493 …return ((val) << A4XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) & A4XX_RB_STENCILREFMASK_STENCILMASK__…  in A4XX_RB_STENCILREFMASK_STENCILMASK()
1497 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILWRITEMASK()  argument
1499 …return ((val) << A4XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) & A4XX_RB_STENCILREFMASK_STENCILW…  in A4XX_RB_STENCILREFMASK_STENCILWRITEMASK()
1505 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILREF()  argument
1507 …return ((val) << A4XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) & A4XX_RB_STENCILREFMASK_BF_STENCILR…  in A4XX_RB_STENCILREFMASK_BF_STENCILREF()
1511 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILMASK()  argument
1513 …return ((val) << A4XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) & A4XX_RB_STENCILREFMASK_BF_STENCIL…  in A4XX_RB_STENCILREFMASK_BF_STENCILMASK()
1517 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()  argument
1519 …return ((val) << A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) & A4XX_RB_STENCILREFMASK_BF_ST…  in A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()
1526 static inline uint32_t A4XX_RB_BIN_OFFSET_X(uint32_t val)  in A4XX_RB_BIN_OFFSET_X()  argument
1528 	return ((val) << A4XX_RB_BIN_OFFSET_X__SHIFT) & A4XX_RB_BIN_OFFSET_X__MASK;  in A4XX_RB_BIN_OFFSET_X()
1532 static inline uint32_t A4XX_RB_BIN_OFFSET_Y(uint32_t val)  in A4XX_RB_BIN_OFFSET_Y()  argument
1534 	return ((val) << A4XX_RB_BIN_OFFSET_Y__SHIFT) & A4XX_RB_BIN_OFFSET_Y__MASK;  in A4XX_RB_BIN_OFFSET_Y()
2200 static inline uint32_t A4XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val)  in A4XX_CP_PROTECT_REG_BASE_ADDR()  argument
2202 	return ((val) << A4XX_CP_PROTECT_REG_BASE_ADDR__SHIFT) & A4XX_CP_PROTECT_REG_BASE_ADDR__MASK;  in A4XX_CP_PROTECT_REG_BASE_ADDR()
2206 static inline uint32_t A4XX_CP_PROTECT_REG_MASK_LEN(uint32_t val)  in A4XX_CP_PROTECT_REG_MASK_LEN()  argument
2208 	return ((val) << A4XX_CP_PROTECT_REG_MASK_LEN__SHIFT) & A4XX_CP_PROTECT_REG_MASK_LEN__MASK;  in A4XX_CP_PROTECT_REG_MASK_LEN()
2212 static inline uint32_t A4XX_CP_PROTECT_REG_TRAP_WRITE(uint32_t val)  in A4XX_CP_PROTECT_REG_TRAP_WRITE()  argument
2214 	return ((val) << A4XX_CP_PROTECT_REG_TRAP_WRITE__SHIFT) & A4XX_CP_PROTECT_REG_TRAP_WRITE__MASK;  in A4XX_CP_PROTECT_REG_TRAP_WRITE()
2218 static inline uint32_t A4XX_CP_PROTECT_REG_TRAP_READ(uint32_t val)  in A4XX_CP_PROTECT_REG_TRAP_READ()  argument
2220 	return ((val) << A4XX_CP_PROTECT_REG_TRAP_READ__SHIFT) & A4XX_CP_PROTECT_REG_TRAP_READ__MASK;  in A4XX_CP_PROTECT_REG_TRAP_READ()
2300 static inline uint32_t A4XX_SP_VS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)  in A4XX_SP_VS_CTRL_REG0_THREADMODE()  argument
2302 	return ((val) << A4XX_SP_VS_CTRL_REG0_THREADMODE__SHIFT) & A4XX_SP_VS_CTRL_REG0_THREADMODE__MASK;  in A4XX_SP_VS_CTRL_REG0_THREADMODE()
2308 static inline uint32_t A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()  argument
2310 …return ((val) << A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A4XX_SP_VS_CTRL_REG0_HALFREGFOOTP…  in A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()
2314 static inline uint32_t A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()  argument
2316 …return ((val) << A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A4XX_SP_VS_CTRL_REG0_FULLREGFOOTP…  in A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()
2320 static inline uint32_t A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP()  argument
2322 …return ((val) << A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP__SHIFT) & A4XX_SP_VS_CTRL_REG0_INOUTREGOVERL…  in A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP()
2326 static inline uint32_t A4XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A4XX_SP_VS_CTRL_REG0_THREADSIZE()  argument
2328 	return ((val) << A4XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT) & A4XX_SP_VS_CTRL_REG0_THREADSIZE__MASK;  in A4XX_SP_VS_CTRL_REG0_THREADSIZE()
2336 static inline uint32_t A4XX_SP_VS_CTRL_REG1_CONSTLENGTH(uint32_t val)  in A4XX_SP_VS_CTRL_REG1_CONSTLENGTH()  argument
2338 	return ((val) << A4XX_SP_VS_CTRL_REG1_CONSTLENGTH__SHIFT) & A4XX_SP_VS_CTRL_REG1_CONSTLENGTH__MASK;  in A4XX_SP_VS_CTRL_REG1_CONSTLENGTH()
2342 static inline uint32_t A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val)  in A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING()  argument
2344 …return ((val) << A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__SHIFT) & A4XX_SP_VS_CTRL_REG1_INITIALOUT…  in A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING()
2350 static inline uint32_t A4XX_SP_VS_PARAM_REG_POSREGID(uint32_t val)  in A4XX_SP_VS_PARAM_REG_POSREGID()  argument
2352 	return ((val) << A4XX_SP_VS_PARAM_REG_POSREGID__SHIFT) & A4XX_SP_VS_PARAM_REG_POSREGID__MASK;  in A4XX_SP_VS_PARAM_REG_POSREGID()
2356 static inline uint32_t A4XX_SP_VS_PARAM_REG_PSIZEREGID(uint32_t val)  in A4XX_SP_VS_PARAM_REG_PSIZEREGID()  argument
2358 	return ((val) << A4XX_SP_VS_PARAM_REG_PSIZEREGID__SHIFT) & A4XX_SP_VS_PARAM_REG_PSIZEREGID__MASK;  in A4XX_SP_VS_PARAM_REG_PSIZEREGID()
2362 static inline uint32_t A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(uint32_t val)  in A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR()  argument
2364 …return ((val) << A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__SHIFT) & A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__…  in A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR()
2372 static inline uint32_t A4XX_SP_VS_OUT_REG_A_REGID(uint32_t val)  in A4XX_SP_VS_OUT_REG_A_REGID()  argument
2374 	return ((val) << A4XX_SP_VS_OUT_REG_A_REGID__SHIFT) & A4XX_SP_VS_OUT_REG_A_REGID__MASK;  in A4XX_SP_VS_OUT_REG_A_REGID()
2378 static inline uint32_t A4XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val)  in A4XX_SP_VS_OUT_REG_A_COMPMASK()  argument
2380 	return ((val) << A4XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT) & A4XX_SP_VS_OUT_REG_A_COMPMASK__MASK;  in A4XX_SP_VS_OUT_REG_A_COMPMASK()
2384 static inline uint32_t A4XX_SP_VS_OUT_REG_B_REGID(uint32_t val)  in A4XX_SP_VS_OUT_REG_B_REGID()  argument
2386 	return ((val) << A4XX_SP_VS_OUT_REG_B_REGID__SHIFT) & A4XX_SP_VS_OUT_REG_B_REGID__MASK;  in A4XX_SP_VS_OUT_REG_B_REGID()
2390 static inline uint32_t A4XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val)  in A4XX_SP_VS_OUT_REG_B_COMPMASK()  argument
2392 	return ((val) << A4XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT) & A4XX_SP_VS_OUT_REG_B_COMPMASK__MASK;  in A4XX_SP_VS_OUT_REG_B_COMPMASK()
2400 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC0()  argument
2402 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC0()
2406 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC1()  argument
2408 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC1()
2412 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC2()  argument
2414 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC2()
2418 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC3()  argument
2420 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC3()
2426 static inline uint32_t A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2428 …return ((val) << A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_VS_OBJ_OFFSET_REG_C…  in A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2432 static inline uint32_t A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2434 …return ((val) << A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_VS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2448 static inline uint32_t A4XX_SP_FS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)  in A4XX_SP_FS_CTRL_REG0_THREADMODE()  argument
2450 	return ((val) << A4XX_SP_FS_CTRL_REG0_THREADMODE__SHIFT) & A4XX_SP_FS_CTRL_REG0_THREADMODE__MASK;  in A4XX_SP_FS_CTRL_REG0_THREADMODE()
2456 static inline uint32_t A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()  argument
2458 …return ((val) << A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A4XX_SP_FS_CTRL_REG0_HALFREGFOOTP…  in A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()
2462 static inline uint32_t A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()  argument
2464 …return ((val) << A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A4XX_SP_FS_CTRL_REG0_FULLREGFOOTP…  in A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()
2468 static inline uint32_t A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP()  argument
2470 …return ((val) << A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP__SHIFT) & A4XX_SP_FS_CTRL_REG0_INOUTREGOVERL…  in A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP()
2474 static inline uint32_t A4XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A4XX_SP_FS_CTRL_REG0_THREADSIZE()  argument
2476 	return ((val) << A4XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT) & A4XX_SP_FS_CTRL_REG0_THREADSIZE__MASK;  in A4XX_SP_FS_CTRL_REG0_THREADSIZE()
2484 static inline uint32_t A4XX_SP_FS_CTRL_REG1_CONSTLENGTH(uint32_t val)  in A4XX_SP_FS_CTRL_REG1_CONSTLENGTH()  argument
2486 	return ((val) << A4XX_SP_FS_CTRL_REG1_CONSTLENGTH__SHIFT) & A4XX_SP_FS_CTRL_REG1_CONSTLENGTH__MASK;  in A4XX_SP_FS_CTRL_REG1_CONSTLENGTH()
2495 static inline uint32_t A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2497 …return ((val) << A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_FS_OBJ_OFFSET_REG_C…  in A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2501 static inline uint32_t A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2503 …return ((val) << A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_FS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2517 static inline uint32_t A4XX_SP_FS_OUTPUT_REG_MRT(uint32_t val)  in A4XX_SP_FS_OUTPUT_REG_MRT()  argument
2519 	return ((val) << A4XX_SP_FS_OUTPUT_REG_MRT__SHIFT) & A4XX_SP_FS_OUTPUT_REG_MRT__MASK;  in A4XX_SP_FS_OUTPUT_REG_MRT()
2524 static inline uint32_t A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID(uint32_t val)  in A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID()  argument
2526 …return ((val) << A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID__SHIFT) & A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID__MA…  in A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID()
2530 static inline uint32_t A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID(uint32_t val)  in A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID()  argument
2532 …return ((val) << A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID__SHIFT) & A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK…  in A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID()
2540 static inline uint32_t A4XX_SP_FS_MRT_REG_REGID(uint32_t val)  in A4XX_SP_FS_MRT_REG_REGID()  argument
2542 	return ((val) << A4XX_SP_FS_MRT_REG_REGID__SHIFT) & A4XX_SP_FS_MRT_REG_REGID__MASK;  in A4XX_SP_FS_MRT_REG_REGID()
2549 static inline uint32_t A4XX_SP_FS_MRT_REG_MRTFORMAT(enum a4xx_color_fmt val)  in A4XX_SP_FS_MRT_REG_MRTFORMAT()  argument
2551 	return ((val) << A4XX_SP_FS_MRT_REG_MRTFORMAT__SHIFT) & A4XX_SP_FS_MRT_REG_MRTFORMAT__MASK;  in A4XX_SP_FS_MRT_REG_MRTFORMAT()
2558 static inline uint32_t A4XX_SP_CS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)  in A4XX_SP_CS_CTRL_REG0_THREADMODE()  argument
2560 	return ((val) << A4XX_SP_CS_CTRL_REG0_THREADMODE__SHIFT) & A4XX_SP_CS_CTRL_REG0_THREADMODE__MASK;  in A4XX_SP_CS_CTRL_REG0_THREADMODE()
2566 static inline uint32_t A4XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A4XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT()  argument
2568 …return ((val) << A4XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A4XX_SP_CS_CTRL_REG0_HALFREGFOOTP…  in A4XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT()
2572 static inline uint32_t A4XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A4XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT()  argument
2574 …return ((val) << A4XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A4XX_SP_CS_CTRL_REG0_FULLREGFOOTP…  in A4XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT()
2578 static inline uint32_t A4XX_SP_CS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)  in A4XX_SP_CS_CTRL_REG0_INOUTREGOVERLAP()  argument
2580 …return ((val) << A4XX_SP_CS_CTRL_REG0_INOUTREGOVERLAP__SHIFT) & A4XX_SP_CS_CTRL_REG0_INOUTREGOVERL…  in A4XX_SP_CS_CTRL_REG0_INOUTREGOVERLAP()
2584 static inline uint32_t A4XX_SP_CS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A4XX_SP_CS_CTRL_REG0_THREADSIZE()  argument
2586 	return ((val) << A4XX_SP_CS_CTRL_REG0_THREADSIZE__SHIFT) & A4XX_SP_CS_CTRL_REG0_THREADSIZE__MASK;  in A4XX_SP_CS_CTRL_REG0_THREADSIZE()
2606 static inline uint32_t A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2608 …return ((val) << A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_HS_OBJ_OFFSET_REG_C…  in A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2612 static inline uint32_t A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2614 …return ((val) << A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_HS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2628 static inline uint32_t A4XX_SP_DS_PARAM_REG_POSREGID(uint32_t val)  in A4XX_SP_DS_PARAM_REG_POSREGID()  argument
2630 	return ((val) << A4XX_SP_DS_PARAM_REG_POSREGID__SHIFT) & A4XX_SP_DS_PARAM_REG_POSREGID__MASK;  in A4XX_SP_DS_PARAM_REG_POSREGID()
2634 static inline uint32_t A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR(uint32_t val)  in A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR()  argument
2636 …return ((val) << A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR__SHIFT) & A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR__…  in A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR()
2644 static inline uint32_t A4XX_SP_DS_OUT_REG_A_REGID(uint32_t val)  in A4XX_SP_DS_OUT_REG_A_REGID()  argument
2646 	return ((val) << A4XX_SP_DS_OUT_REG_A_REGID__SHIFT) & A4XX_SP_DS_OUT_REG_A_REGID__MASK;  in A4XX_SP_DS_OUT_REG_A_REGID()
2650 static inline uint32_t A4XX_SP_DS_OUT_REG_A_COMPMASK(uint32_t val)  in A4XX_SP_DS_OUT_REG_A_COMPMASK()  argument
2652 	return ((val) << A4XX_SP_DS_OUT_REG_A_COMPMASK__SHIFT) & A4XX_SP_DS_OUT_REG_A_COMPMASK__MASK;  in A4XX_SP_DS_OUT_REG_A_COMPMASK()
2656 static inline uint32_t A4XX_SP_DS_OUT_REG_B_REGID(uint32_t val)  in A4XX_SP_DS_OUT_REG_B_REGID()  argument
2658 	return ((val) << A4XX_SP_DS_OUT_REG_B_REGID__SHIFT) & A4XX_SP_DS_OUT_REG_B_REGID__MASK;  in A4XX_SP_DS_OUT_REG_B_REGID()
2662 static inline uint32_t A4XX_SP_DS_OUT_REG_B_COMPMASK(uint32_t val)  in A4XX_SP_DS_OUT_REG_B_COMPMASK()  argument
2664 	return ((val) << A4XX_SP_DS_OUT_REG_B_COMPMASK__SHIFT) & A4XX_SP_DS_OUT_REG_B_COMPMASK__MASK;  in A4XX_SP_DS_OUT_REG_B_COMPMASK()
2672 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC0()  argument
2674 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC0__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC0__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC0()
2678 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC1()  argument
2680 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC1__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC1__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC1()
2684 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC2()  argument
2686 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC2__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC2__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC2()
2690 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC3()  argument
2692 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC3__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC3__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC3()
2698 static inline uint32_t A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2700 …return ((val) << A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_DS_OBJ_OFFSET_REG_C…  in A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2704 static inline uint32_t A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2706 …return ((val) << A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_DS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2720 static inline uint32_t A4XX_SP_GS_PARAM_REG_POSREGID(uint32_t val)  in A4XX_SP_GS_PARAM_REG_POSREGID()  argument
2722 	return ((val) << A4XX_SP_GS_PARAM_REG_POSREGID__SHIFT) & A4XX_SP_GS_PARAM_REG_POSREGID__MASK;  in A4XX_SP_GS_PARAM_REG_POSREGID()
2726 static inline uint32_t A4XX_SP_GS_PARAM_REG_PRIMREGID(uint32_t val)  in A4XX_SP_GS_PARAM_REG_PRIMREGID()  argument
2728 	return ((val) << A4XX_SP_GS_PARAM_REG_PRIMREGID__SHIFT) & A4XX_SP_GS_PARAM_REG_PRIMREGID__MASK;  in A4XX_SP_GS_PARAM_REG_PRIMREGID()
2732 static inline uint32_t A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR(uint32_t val)  in A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR()  argument
2734 …return ((val) << A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR__SHIFT) & A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR__…  in A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR()
2742 static inline uint32_t A4XX_SP_GS_OUT_REG_A_REGID(uint32_t val)  in A4XX_SP_GS_OUT_REG_A_REGID()  argument
2744 	return ((val) << A4XX_SP_GS_OUT_REG_A_REGID__SHIFT) & A4XX_SP_GS_OUT_REG_A_REGID__MASK;  in A4XX_SP_GS_OUT_REG_A_REGID()
2748 static inline uint32_t A4XX_SP_GS_OUT_REG_A_COMPMASK(uint32_t val)  in A4XX_SP_GS_OUT_REG_A_COMPMASK()  argument
2750 	return ((val) << A4XX_SP_GS_OUT_REG_A_COMPMASK__SHIFT) & A4XX_SP_GS_OUT_REG_A_COMPMASK__MASK;  in A4XX_SP_GS_OUT_REG_A_COMPMASK()
2754 static inline uint32_t A4XX_SP_GS_OUT_REG_B_REGID(uint32_t val)  in A4XX_SP_GS_OUT_REG_B_REGID()  argument
2756 	return ((val) << A4XX_SP_GS_OUT_REG_B_REGID__SHIFT) & A4XX_SP_GS_OUT_REG_B_REGID__MASK;  in A4XX_SP_GS_OUT_REG_B_REGID()
2760 static inline uint32_t A4XX_SP_GS_OUT_REG_B_COMPMASK(uint32_t val)  in A4XX_SP_GS_OUT_REG_B_COMPMASK()  argument
2762 	return ((val) << A4XX_SP_GS_OUT_REG_B_COMPMASK__SHIFT) & A4XX_SP_GS_OUT_REG_B_COMPMASK__MASK;  in A4XX_SP_GS_OUT_REG_B_COMPMASK()
2770 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC0()  argument
2772 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC0__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC0__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC0()
2776 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC1()  argument
2778 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC1__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC1__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC1()
2782 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC2()  argument
2784 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC2__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC2__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC2()
2788 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC3()  argument
2790 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC3__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC3__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC3()
2796 static inline uint32_t A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2798 …return ((val) << A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_GS_OBJ_OFFSET_REG_C…  in A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2802 static inline uint32_t A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2804 …return ((val) << A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_GS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2832 static inline uint32_t A4XX_VPC_ATTR_TOTALATTR(uint32_t val)  in A4XX_VPC_ATTR_TOTALATTR()  argument
2834 	return ((val) << A4XX_VPC_ATTR_TOTALATTR__SHIFT) & A4XX_VPC_ATTR_TOTALATTR__MASK;  in A4XX_VPC_ATTR_TOTALATTR()
2839 static inline uint32_t A4XX_VPC_ATTR_THRDASSIGN(uint32_t val)  in A4XX_VPC_ATTR_THRDASSIGN()  argument
2841 	return ((val) << A4XX_VPC_ATTR_THRDASSIGN__SHIFT) & A4XX_VPC_ATTR_THRDASSIGN__MASK;  in A4XX_VPC_ATTR_THRDASSIGN()
2848 static inline uint32_t A4XX_VPC_PACK_NUMBYPASSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMBYPASSVAR()  argument
2850 	return ((val) << A4XX_VPC_PACK_NUMBYPASSVAR__SHIFT) & A4XX_VPC_PACK_NUMBYPASSVAR__MASK;  in A4XX_VPC_PACK_NUMBYPASSVAR()
2854 static inline uint32_t A4XX_VPC_PACK_NUMFPNONPOSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMFPNONPOSVAR()  argument
2856 	return ((val) << A4XX_VPC_PACK_NUMFPNONPOSVAR__SHIFT) & A4XX_VPC_PACK_NUMFPNONPOSVAR__MASK;  in A4XX_VPC_PACK_NUMFPNONPOSVAR()
2860 static inline uint32_t A4XX_VPC_PACK_NUMNONPOSVSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMNONPOSVSVAR()  argument
2862 	return ((val) << A4XX_VPC_PACK_NUMNONPOSVSVAR__SHIFT) & A4XX_VPC_PACK_NUMNONPOSVSVAR__MASK;  in A4XX_VPC_PACK_NUMNONPOSVSVAR()
2878 static inline uint32_t A4XX_VSC_BIN_SIZE_WIDTH(uint32_t val)  in A4XX_VSC_BIN_SIZE_WIDTH()  argument
2880 	return ((val >> 5) << A4XX_VSC_BIN_SIZE_WIDTH__SHIFT) & A4XX_VSC_BIN_SIZE_WIDTH__MASK;  in A4XX_VSC_BIN_SIZE_WIDTH()
2884 static inline uint32_t A4XX_VSC_BIN_SIZE_HEIGHT(uint32_t val)  in A4XX_VSC_BIN_SIZE_HEIGHT()  argument
2886 	return ((val >> 5) << A4XX_VSC_BIN_SIZE_HEIGHT__SHIFT) & A4XX_VSC_BIN_SIZE_HEIGHT__MASK;  in A4XX_VSC_BIN_SIZE_HEIGHT()
2900 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_X(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_X()  argument
2902 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_X__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_X__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_X()
2906 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_Y(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_Y()  argument
2908 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_Y__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_Y__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_Y()
2912 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_W(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_W()  argument
2914 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_W__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_W__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_W()
2918 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_H(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_H()  argument
2920 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_H__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_H__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_H()
2962 static inline uint32_t A4XX_VFD_CONTROL_0_TOTALATTRTOVS(uint32_t val)  in A4XX_VFD_CONTROL_0_TOTALATTRTOVS()  argument
2964 	return ((val) << A4XX_VFD_CONTROL_0_TOTALATTRTOVS__SHIFT) & A4XX_VFD_CONTROL_0_TOTALATTRTOVS__MASK;  in A4XX_VFD_CONTROL_0_TOTALATTRTOVS()
2968 static inline uint32_t A4XX_VFD_CONTROL_0_BYPASSATTROVS(uint32_t val)  in A4XX_VFD_CONTROL_0_BYPASSATTROVS()  argument
2970 	return ((val) << A4XX_VFD_CONTROL_0_BYPASSATTROVS__SHIFT) & A4XX_VFD_CONTROL_0_BYPASSATTROVS__MASK;  in A4XX_VFD_CONTROL_0_BYPASSATTROVS()
2974 static inline uint32_t A4XX_VFD_CONTROL_0_STRMDECINSTRCNT(uint32_t val)  in A4XX_VFD_CONTROL_0_STRMDECINSTRCNT()  argument
2976 …return ((val) << A4XX_VFD_CONTROL_0_STRMDECINSTRCNT__SHIFT) & A4XX_VFD_CONTROL_0_STRMDECINSTRCNT__…  in A4XX_VFD_CONTROL_0_STRMDECINSTRCNT()
2980 static inline uint32_t A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT(uint32_t val)  in A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT()  argument
2982 …return ((val) << A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__SHIFT) & A4XX_VFD_CONTROL_0_STRMFETCHINSTRC…  in A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT()
2988 static inline uint32_t A4XX_VFD_CONTROL_1_MAXSTORAGE(uint32_t val)  in A4XX_VFD_CONTROL_1_MAXSTORAGE()  argument
2990 	return ((val) << A4XX_VFD_CONTROL_1_MAXSTORAGE__SHIFT) & A4XX_VFD_CONTROL_1_MAXSTORAGE__MASK;  in A4XX_VFD_CONTROL_1_MAXSTORAGE()
2994 static inline uint32_t A4XX_VFD_CONTROL_1_REGID4VTX(uint32_t val)  in A4XX_VFD_CONTROL_1_REGID4VTX()  argument
2996 	return ((val) << A4XX_VFD_CONTROL_1_REGID4VTX__SHIFT) & A4XX_VFD_CONTROL_1_REGID4VTX__MASK;  in A4XX_VFD_CONTROL_1_REGID4VTX()
3000 static inline uint32_t A4XX_VFD_CONTROL_1_REGID4INST(uint32_t val)  in A4XX_VFD_CONTROL_1_REGID4INST()  argument
3002 	return ((val) << A4XX_VFD_CONTROL_1_REGID4INST__SHIFT) & A4XX_VFD_CONTROL_1_REGID4INST__MASK;  in A4XX_VFD_CONTROL_1_REGID4INST()
3010 static inline uint32_t A4XX_VFD_CONTROL_3_REGID_VTXCNT(uint32_t val)  in A4XX_VFD_CONTROL_3_REGID_VTXCNT()  argument
3012 	return ((val) << A4XX_VFD_CONTROL_3_REGID_VTXCNT__SHIFT) & A4XX_VFD_CONTROL_3_REGID_VTXCNT__MASK;  in A4XX_VFD_CONTROL_3_REGID_VTXCNT()
3016 static inline uint32_t A4XX_VFD_CONTROL_3_REGID_TESSX(uint32_t val)  in A4XX_VFD_CONTROL_3_REGID_TESSX()  argument
3018 	return ((val) << A4XX_VFD_CONTROL_3_REGID_TESSX__SHIFT) & A4XX_VFD_CONTROL_3_REGID_TESSX__MASK;  in A4XX_VFD_CONTROL_3_REGID_TESSX()
3022 static inline uint32_t A4XX_VFD_CONTROL_3_REGID_TESSY(uint32_t val)  in A4XX_VFD_CONTROL_3_REGID_TESSY()  argument
3024 	return ((val) << A4XX_VFD_CONTROL_3_REGID_TESSY__SHIFT) & A4XX_VFD_CONTROL_3_REGID_TESSY__MASK;  in A4XX_VFD_CONTROL_3_REGID_TESSY()
3036 static inline uint32_t A4XX_VFD_FETCH_INSTR_0_FETCHSIZE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_0_FETCHSIZE()  argument
3038 	return ((val) << A4XX_VFD_FETCH_INSTR_0_FETCHSIZE__SHIFT) & A4XX_VFD_FETCH_INSTR_0_FETCHSIZE__MASK;  in A4XX_VFD_FETCH_INSTR_0_FETCHSIZE()
3042 static inline uint32_t A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE()  argument
3044 	return ((val) << A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE__SHIFT) & A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE__MASK;  in A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE()
3054 static inline uint32_t A4XX_VFD_FETCH_INSTR_2_SIZE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_2_SIZE()  argument
3056 	return ((val) << A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT) & A4XX_VFD_FETCH_INSTR_2_SIZE__MASK;  in A4XX_VFD_FETCH_INSTR_2_SIZE()
3062 static inline uint32_t A4XX_VFD_FETCH_INSTR_3_STEPRATE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_3_STEPRATE()  argument
3064 	return ((val) << A4XX_VFD_FETCH_INSTR_3_STEPRATE__SHIFT) & A4XX_VFD_FETCH_INSTR_3_STEPRATE__MASK;  in A4XX_VFD_FETCH_INSTR_3_STEPRATE()
3072 static inline uint32_t A4XX_VFD_DECODE_INSTR_WRITEMASK(uint32_t val)  in A4XX_VFD_DECODE_INSTR_WRITEMASK()  argument
3074 	return ((val) << A4XX_VFD_DECODE_INSTR_WRITEMASK__SHIFT) & A4XX_VFD_DECODE_INSTR_WRITEMASK__MASK;  in A4XX_VFD_DECODE_INSTR_WRITEMASK()
3079 static inline uint32_t A4XX_VFD_DECODE_INSTR_FORMAT(enum a4xx_vtx_fmt val)  in A4XX_VFD_DECODE_INSTR_FORMAT()  argument
3081 	return ((val) << A4XX_VFD_DECODE_INSTR_FORMAT__SHIFT) & A4XX_VFD_DECODE_INSTR_FORMAT__MASK;  in A4XX_VFD_DECODE_INSTR_FORMAT()
3085 static inline uint32_t A4XX_VFD_DECODE_INSTR_REGID(uint32_t val)  in A4XX_VFD_DECODE_INSTR_REGID()  argument
3087 	return ((val) << A4XX_VFD_DECODE_INSTR_REGID__SHIFT) & A4XX_VFD_DECODE_INSTR_REGID__MASK;  in A4XX_VFD_DECODE_INSTR_REGID()
3092 static inline uint32_t A4XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val)  in A4XX_VFD_DECODE_INSTR_SWAP()  argument
3094 	return ((val) << A4XX_VFD_DECODE_INSTR_SWAP__SHIFT) & A4XX_VFD_DECODE_INSTR_SWAP__MASK;  in A4XX_VFD_DECODE_INSTR_SWAP()
3098 static inline uint32_t A4XX_VFD_DECODE_INSTR_SHIFTCNT(uint32_t val)  in A4XX_VFD_DECODE_INSTR_SHIFTCNT()  argument
3100 	return ((val) << A4XX_VFD_DECODE_INSTR_SHIFTCNT__SHIFT) & A4XX_VFD_DECODE_INSTR_SHIFTCNT__MASK;  in A4XX_VFD_DECODE_INSTR_SHIFTCNT()
3130 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_VS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_VS()  argument
3132 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_VS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_VS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_VS()
3136 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_HS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_HS()  argument
3138 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_HS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_HS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_HS()
3142 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_DS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_DS()  argument
3144 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_DS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_DS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_DS()
3148 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_GS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_GS()  argument
3150 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_GS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_GS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_GS()
3204 static inline uint32_t A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val)  in A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ()  argument
3206 	return ((val) << A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ__SHIFT) & A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ__MASK;  in A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ()
3210 static inline uint32_t A4XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val)  in A4XX_GRAS_CL_GB_CLIP_ADJ_VERT()  argument
3212 	return ((val) << A4XX_GRAS_CL_GB_CLIP_ADJ_VERT__SHIFT) & A4XX_GRAS_CL_GB_CLIP_ADJ_VERT__MASK;  in A4XX_GRAS_CL_GB_CLIP_ADJ_VERT()
3218 static inline uint32_t A4XX_GRAS_CL_VPORT_XOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_XOFFSET_0()  argument
3220 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_XOFFSET_0__MASK;  in A4XX_GRAS_CL_VPORT_XOFFSET_0()
3226 static inline uint32_t A4XX_GRAS_CL_VPORT_XSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_XSCALE_0()  argument
3228 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_XSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_XSCALE_0__MASK;  in A4XX_GRAS_CL_VPORT_XSCALE_0()
3234 static inline uint32_t A4XX_GRAS_CL_VPORT_YOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_YOFFSET_0()  argument
3236 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_YOFFSET_0__MASK;  in A4XX_GRAS_CL_VPORT_YOFFSET_0()
3242 static inline uint32_t A4XX_GRAS_CL_VPORT_YSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_YSCALE_0()  argument
3244 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_YSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_YSCALE_0__MASK;  in A4XX_GRAS_CL_VPORT_YSCALE_0()
3250 static inline uint32_t A4XX_GRAS_CL_VPORT_ZOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_ZOFFSET_0()  argument
3252 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_ZOFFSET_0__MASK;  in A4XX_GRAS_CL_VPORT_ZOFFSET_0()
3258 static inline uint32_t A4XX_GRAS_CL_VPORT_ZSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_ZSCALE_0()  argument
3260 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_ZSCALE_0__MASK;  in A4XX_GRAS_CL_VPORT_ZSCALE_0()
3266 static inline uint32_t A4XX_GRAS_SU_POINT_MINMAX_MIN(float val)  in A4XX_GRAS_SU_POINT_MINMAX_MIN()  argument
3268 …return ((((uint32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) & A4XX_GRAS_SU_POINT_M…  in A4XX_GRAS_SU_POINT_MINMAX_MIN()
3272 static inline uint32_t A4XX_GRAS_SU_POINT_MINMAX_MAX(float val)  in A4XX_GRAS_SU_POINT_MINMAX_MAX()  argument
3274 …return ((((uint32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) & A4XX_GRAS_SU_POINT_M…  in A4XX_GRAS_SU_POINT_MINMAX_MAX()
3280 static inline uint32_t A4XX_GRAS_SU_POINT_SIZE(float val)  in A4XX_GRAS_SU_POINT_SIZE()  argument
3282 …return ((((int32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_SIZE__SHIFT) & A4XX_GRAS_SU_POINT_SIZE__MA…  in A4XX_GRAS_SU_POINT_SIZE()
3292 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_SCALE(float val)  in A4XX_GRAS_SU_POLY_OFFSET_SCALE()  argument
3294 …return ((fui(val)) << A4XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT) & A4XX_GRAS_SU_POLY_OFFSET_SCALE__MAS…  in A4XX_GRAS_SU_POLY_OFFSET_SCALE()
3300 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_OFFSET(float val)  in A4XX_GRAS_SU_POLY_OFFSET_OFFSET()  argument
3302 …return ((fui(val)) << A4XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) & A4XX_GRAS_SU_POLY_OFFSET_OFFSET__M…  in A4XX_GRAS_SU_POLY_OFFSET_OFFSET()
3308 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_CLAMP(float val)  in A4XX_GRAS_SU_POLY_OFFSET_CLAMP()  argument
3310 …return ((fui(val)) << A4XX_GRAS_SU_POLY_OFFSET_CLAMP__SHIFT) & A4XX_GRAS_SU_POLY_OFFSET_CLAMP__MAS…  in A4XX_GRAS_SU_POLY_OFFSET_CLAMP()
3316 static inline uint32_t A4XX_GRAS_DEPTH_CONTROL_FORMAT(enum a4xx_depth_format val)  in A4XX_GRAS_DEPTH_CONTROL_FORMAT()  argument
3318 	return ((val) << A4XX_GRAS_DEPTH_CONTROL_FORMAT__SHIFT) & A4XX_GRAS_DEPTH_CONTROL_FORMAT__MASK;  in A4XX_GRAS_DEPTH_CONTROL_FORMAT()
3327 static inline uint32_t A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(float val)  in A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH()  argument
3329 …return ((((int32_t)(val * 4.0))) << A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__SHIFT) & A4XX_GRAS_SU…  in A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH()
3338 static inline uint32_t A4XX_GRAS_SC_CONTROL_RENDER_MODE(enum a3xx_render_mode val)  in A4XX_GRAS_SC_CONTROL_RENDER_MODE()  argument
3340 	return ((val) << A4XX_GRAS_SC_CONTROL_RENDER_MODE__SHIFT) & A4XX_GRAS_SC_CONTROL_RENDER_MODE__MASK;  in A4XX_GRAS_SC_CONTROL_RENDER_MODE()
3344 static inline uint32_t A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(uint32_t val)  in A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES()  argument
3346 …return ((val) << A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES__SHIFT) & A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES__MA…  in A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES()
3351 static inline uint32_t A4XX_GRAS_SC_CONTROL_RASTER_MODE(uint32_t val)  in A4XX_GRAS_SC_CONTROL_RASTER_MODE()  argument
3353 	return ((val) << A4XX_GRAS_SC_CONTROL_RASTER_MODE__SHIFT) & A4XX_GRAS_SC_CONTROL_RASTER_MODE__MASK;  in A4XX_GRAS_SC_CONTROL_RASTER_MODE()
3360 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X()  argument
3362 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X()
3366 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y()  argument
3368 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y()
3375 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X()  argument
3377 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X()
3381 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y()  argument
3383 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y()
3390 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X()  argument
3392 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X()
3396 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()  argument
3398 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()
3405 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X()  argument
3407 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X()
3411 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()  argument
3413 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()
3420 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_BR_X(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_X()  argument
3422 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_BR_X__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_BR_X__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_X()
3426 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y()  argument
3428 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y()
3435 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_TL_X(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_X()  argument
3437 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_TL_X__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_TL_X__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_X()
3441 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y()  argument
3443 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y()
3503 static inline uint32_t A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val)  in A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()  argument
3505 …return ((val) << A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT) & A4XX_HLSQ_CONTROL_0_REG_FSTHREADSI…  in A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()
3513 static inline uint32_t A4XX_HLSQ_CONTROL_0_REG_CONSTMODE(uint32_t val)  in A4XX_HLSQ_CONTROL_0_REG_CONSTMODE()  argument
3515 …return ((val) << A4XX_HLSQ_CONTROL_0_REG_CONSTMODE__SHIFT) & A4XX_HLSQ_CONTROL_0_REG_CONSTMODE__MA…  in A4XX_HLSQ_CONTROL_0_REG_CONSTMODE()
3525 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(enum a3xx_threadsize val)  in A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE()  argument
3527 …return ((val) << A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__SHIFT) & A4XX_HLSQ_CONTROL_1_REG_VSTHREADSI…  in A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE()
3533 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_COORDREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_1_REG_COORDREGID()  argument
3535 …return ((val) << A4XX_HLSQ_CONTROL_1_REG_COORDREGID__SHIFT) & A4XX_HLSQ_CONTROL_1_REG_COORDREGID__…  in A4XX_HLSQ_CONTROL_1_REG_COORDREGID()
3539 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID()  argument
3541 …return ((val) << A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID__SHIFT) & A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREG…  in A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID()
3547 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD()  argument
3549 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_PRIM…  in A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD()
3553 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_FACEREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_FACEREGID()  argument
3555 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_FACEREGID__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_FACEREGID__MA…  in A4XX_HLSQ_CONTROL_2_REG_FACEREGID()
3559 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID()  argument
3561 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_SAMPLEID…  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID()
3565 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID()  argument
3567 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_SAMPLE…  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID()
3573 static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL(uint32_t val)  in A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL()  argument
3575 …return ((val) << A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL__SHIFT) & A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP…  in A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL()
3579 static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL(uint32_t val)  in A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL()  argument
3581 …return ((val) << A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL__SHIFT) & A4XX_HLSQ_CONTROL_3_REG_IJ_LINE…  in A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL()
3585 static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID(uint32_t val)  in A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID()  argument
3587 …return ((val) << A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID__SHIFT) & A4XX_HLSQ_CONTROL_3_REG_IJ_PE…  in A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID()
3591 static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID(uint32_t val)  in A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID()  argument
3593 …return ((val) << A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID__SHIFT) & A4XX_HLSQ_CONTROL_3_REG_IJ_L…  in A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID()
3599 static inline uint32_t A4XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE(uint32_t val)  in A4XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE()  argument
3601 …return ((val) << A4XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE__SHIFT) & A4XX_HLSQ_CONTROL_4_REG_IJ_PERS…  in A4XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE()
3605 static inline uint32_t A4XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE(uint32_t val)  in A4XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE()  argument
3607 …return ((val) << A4XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE__SHIFT) & A4XX_HLSQ_CONTROL_4_REG_IJ_LIN…  in A4XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE()
3613 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH()  argument
3615 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH()
3619 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3621 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_CON…  in A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET()
3627 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET()  argument
3629 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_SHADE…  in A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET()
3633 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH()  argument
3635 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH()
3641 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH()  argument
3643 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH()
3647 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3649 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_CON…  in A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET()
3655 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET()  argument
3657 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_SHADE…  in A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET()
3661 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH()  argument
3663 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH()
3669 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH()  argument
3671 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH()
3675 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3677 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_CON…  in A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET()
3683 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET()  argument
3685 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_SHADE…  in A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET()
3689 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH()  argument
3691 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH()
3697 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH()  argument
3699 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH()
3703 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3705 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_CON…  in A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET()
3711 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET()  argument
3713 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_SHADE…  in A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET()
3717 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH()  argument
3719 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH()
3725 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH()  argument
3727 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH()
3731 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3733 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_CON…  in A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET()
3739 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET()  argument
3741 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_SHADE…  in A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET()
3745 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH()  argument
3747 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH()
3753 static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH()  argument
3755 …return ((val) << A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_CS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH()
3759 static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3761 …return ((val) << A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_CS_CONTROL_REG_CON…  in A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET()
3767 static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET()  argument
3769 …return ((val) << A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_CS_CONTROL_REG_SHADE…  in A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET()
3773 static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH()  argument
3775 …return ((val) << A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_CS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH()
3781 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM()  argument
3783 	return ((val) << A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM__SHIFT) & A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM__MASK;  in A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM()
3787 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX()  argument
3789 …return ((val) << A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX__SHIFT) & A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX__MA…  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX()
3793 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY()  argument
3795 …return ((val) << A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY__SHIFT) & A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY__MA…  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY()
3799 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ()  argument
3801 …return ((val) << A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ__SHIFT) & A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ__MA…  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ()
3807 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_1_SIZE_X(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_1_SIZE_X()  argument
3809 	return ((val) << A4XX_HLSQ_CL_NDRANGE_1_SIZE_X__SHIFT) & A4XX_HLSQ_CL_NDRANGE_1_SIZE_X__MASK;  in A4XX_HLSQ_CL_NDRANGE_1_SIZE_X()
3817 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y()  argument
3819 	return ((val) << A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y__SHIFT) & A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y__MASK;  in A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y()
3827 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z()  argument
3829 	return ((val) << A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z__SHIFT) & A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z__MASK;  in A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z()
3837 static inline uint32_t A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID(uint32_t val)  in A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID()  argument
3839 …return ((val) << A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID__SHIFT) & A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID__…  in A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID()
3843 static inline uint32_t A4XX_HLSQ_CL_CONTROL_0_KERNELDIMCONSTID(uint32_t val)  in A4XX_HLSQ_CL_CONTROL_0_KERNELDIMCONSTID()  argument
3845 …return ((val) << A4XX_HLSQ_CL_CONTROL_0_KERNELDIMCONSTID__SHIFT) & A4XX_HLSQ_CL_CONTROL_0_KERNELDI…  in A4XX_HLSQ_CL_CONTROL_0_KERNELDIMCONSTID()
3849 static inline uint32_t A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID(uint32_t val)  in A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID()  argument
3851 …return ((val) << A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID__SHIFT) & A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID…  in A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID()
3857 static inline uint32_t A4XX_HLSQ_CL_CONTROL_1_UNK0CONSTID(uint32_t val)  in A4XX_HLSQ_CL_CONTROL_1_UNK0CONSTID()  argument
3859 …return ((val) << A4XX_HLSQ_CL_CONTROL_1_UNK0CONSTID__SHIFT) & A4XX_HLSQ_CL_CONTROL_1_UNK0CONSTID__…  in A4XX_HLSQ_CL_CONTROL_1_UNK0CONSTID()
3863 static inline uint32_t A4XX_HLSQ_CL_CONTROL_1_WORKGROUPSIZECONSTID(uint32_t val)  in A4XX_HLSQ_CL_CONTROL_1_WORKGROUPSIZECONSTID()  argument
3865 …return ((val) << A4XX_HLSQ_CL_CONTROL_1_WORKGROUPSIZECONSTID__SHIFT) & A4XX_HLSQ_CL_CONTROL_1_WORK…  in A4XX_HLSQ_CL_CONTROL_1_WORKGROUPSIZECONSTID()
3871 static inline uint32_t A4XX_HLSQ_CL_KERNEL_CONST_UNK0CONSTID(uint32_t val)  in A4XX_HLSQ_CL_KERNEL_CONST_UNK0CONSTID()  argument
3873 …return ((val) << A4XX_HLSQ_CL_KERNEL_CONST_UNK0CONSTID__SHIFT) & A4XX_HLSQ_CL_KERNEL_CONST_UNK0CON…  in A4XX_HLSQ_CL_KERNEL_CONST_UNK0CONSTID()
3877 static inline uint32_t A4XX_HLSQ_CL_KERNEL_CONST_NUMWGCONSTID(uint32_t val)  in A4XX_HLSQ_CL_KERNEL_CONST_NUMWGCONSTID()  argument
3879 …return ((val) << A4XX_HLSQ_CL_KERNEL_CONST_NUMWGCONSTID__SHIFT) & A4XX_HLSQ_CL_KERNEL_CONST_NUMWGC…  in A4XX_HLSQ_CL_KERNEL_CONST_NUMWGCONSTID()
3891 static inline uint32_t A4XX_HLSQ_CL_WG_OFFSET_UNK0CONSTID(uint32_t val)  in A4XX_HLSQ_CL_WG_OFFSET_UNK0CONSTID()  argument
3893 …return ((val) << A4XX_HLSQ_CL_WG_OFFSET_UNK0CONSTID__SHIFT) & A4XX_HLSQ_CL_WG_OFFSET_UNK0CONSTID__…  in A4XX_HLSQ_CL_WG_OFFSET_UNK0CONSTID()
3926 static inline uint32_t A4XX_PC_VSTREAM_CONTROL_SIZE(uint32_t val)  in A4XX_PC_VSTREAM_CONTROL_SIZE()  argument
3928 	return ((val) << A4XX_PC_VSTREAM_CONTROL_SIZE__SHIFT) & A4XX_PC_VSTREAM_CONTROL_SIZE__MASK;  in A4XX_PC_VSTREAM_CONTROL_SIZE()
3932 static inline uint32_t A4XX_PC_VSTREAM_CONTROL_N(uint32_t val)  in A4XX_PC_VSTREAM_CONTROL_N()  argument
3934 	return ((val) << A4XX_PC_VSTREAM_CONTROL_N__SHIFT) & A4XX_PC_VSTREAM_CONTROL_N__MASK;  in A4XX_PC_VSTREAM_CONTROL_N()
3940 static inline uint32_t A4XX_PC_PRIM_VTX_CNTL_VAROUT(uint32_t val)  in A4XX_PC_PRIM_VTX_CNTL_VAROUT()  argument
3942 	return ((val) << A4XX_PC_PRIM_VTX_CNTL_VAROUT__SHIFT) & A4XX_PC_PRIM_VTX_CNTL_VAROUT__MASK;  in A4XX_PC_PRIM_VTX_CNTL_VAROUT()
3951 static inline uint32_t A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val)  in A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE()  argument
3953 …return ((val) << A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE__SHIFT) & A4XX_PC_PRIM_VTX_CNTL2_POLY…  in A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE()
3957 static inline uint32_t A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val)  in A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE()  argument
3959 …return ((val) << A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE__SHIFT) & A4XX_PC_PRIM_VTX_CNTL2_POLYM…  in A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE()
3968 static inline uint32_t A4XX_PC_GS_PARAM_MAX_VERTICES(uint32_t val)  in A4XX_PC_GS_PARAM_MAX_VERTICES()  argument
3970 	return ((val) << A4XX_PC_GS_PARAM_MAX_VERTICES__SHIFT) & A4XX_PC_GS_PARAM_MAX_VERTICES__MASK;  in A4XX_PC_GS_PARAM_MAX_VERTICES()
3974 static inline uint32_t A4XX_PC_GS_PARAM_INVOCATIONS(uint32_t val)  in A4XX_PC_GS_PARAM_INVOCATIONS()  argument
3976 	return ((val) << A4XX_PC_GS_PARAM_INVOCATIONS__SHIFT) & A4XX_PC_GS_PARAM_INVOCATIONS__MASK;  in A4XX_PC_GS_PARAM_INVOCATIONS()
3980 static inline uint32_t A4XX_PC_GS_PARAM_PRIMTYPE(enum adreno_pa_su_sc_draw val)  in A4XX_PC_GS_PARAM_PRIMTYPE()  argument
3982 	return ((val) << A4XX_PC_GS_PARAM_PRIMTYPE__SHIFT) & A4XX_PC_GS_PARAM_PRIMTYPE__MASK;  in A4XX_PC_GS_PARAM_PRIMTYPE()
3989 static inline uint32_t A4XX_PC_HS_PARAM_VERTICES_OUT(uint32_t val)  in A4XX_PC_HS_PARAM_VERTICES_OUT()  argument
3991 	return ((val) << A4XX_PC_HS_PARAM_VERTICES_OUT__SHIFT) & A4XX_PC_HS_PARAM_VERTICES_OUT__MASK;  in A4XX_PC_HS_PARAM_VERTICES_OUT()
3995 static inline uint32_t A4XX_PC_HS_PARAM_SPACING(enum a4xx_tess_spacing val)  in A4XX_PC_HS_PARAM_SPACING()  argument
3997 	return ((val) << A4XX_PC_HS_PARAM_SPACING__SHIFT) & A4XX_PC_HS_PARAM_SPACING__MASK;  in A4XX_PC_HS_PARAM_SPACING()
4103 static inline uint32_t A4XX_TEX_SAMP_0_XY_MAG(enum a4xx_tex_filter val)  in A4XX_TEX_SAMP_0_XY_MAG()  argument
4105 	return ((val) << A4XX_TEX_SAMP_0_XY_MAG__SHIFT) & A4XX_TEX_SAMP_0_XY_MAG__MASK;  in A4XX_TEX_SAMP_0_XY_MAG()
4109 static inline uint32_t A4XX_TEX_SAMP_0_XY_MIN(enum a4xx_tex_filter val)  in A4XX_TEX_SAMP_0_XY_MIN()  argument
4111 	return ((val) << A4XX_TEX_SAMP_0_XY_MIN__SHIFT) & A4XX_TEX_SAMP_0_XY_MIN__MASK;  in A4XX_TEX_SAMP_0_XY_MIN()
4115 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_S(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_S()  argument
4117 	return ((val) << A4XX_TEX_SAMP_0_WRAP_S__SHIFT) & A4XX_TEX_SAMP_0_WRAP_S__MASK;  in A4XX_TEX_SAMP_0_WRAP_S()
4121 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_T(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_T()  argument
4123 	return ((val) << A4XX_TEX_SAMP_0_WRAP_T__SHIFT) & A4XX_TEX_SAMP_0_WRAP_T__MASK;  in A4XX_TEX_SAMP_0_WRAP_T()
4127 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_R(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_R()  argument
4129 	return ((val) << A4XX_TEX_SAMP_0_WRAP_R__SHIFT) & A4XX_TEX_SAMP_0_WRAP_R__MASK;  in A4XX_TEX_SAMP_0_WRAP_R()
4133 static inline uint32_t A4XX_TEX_SAMP_0_ANISO(enum a4xx_tex_aniso val)  in A4XX_TEX_SAMP_0_ANISO()  argument
4135 	return ((val) << A4XX_TEX_SAMP_0_ANISO__SHIFT) & A4XX_TEX_SAMP_0_ANISO__MASK;  in A4XX_TEX_SAMP_0_ANISO()
4139 static inline uint32_t A4XX_TEX_SAMP_0_LOD_BIAS(float val)  in A4XX_TEX_SAMP_0_LOD_BIAS()  argument
4141 …return ((((int32_t)(val * 256.0))) << A4XX_TEX_SAMP_0_LOD_BIAS__SHIFT) & A4XX_TEX_SAMP_0_LOD_BIAS_…  in A4XX_TEX_SAMP_0_LOD_BIAS()
4147 static inline uint32_t A4XX_TEX_SAMP_1_COMPARE_FUNC(enum adreno_compare_func val)  in A4XX_TEX_SAMP_1_COMPARE_FUNC()  argument
4149 	return ((val) << A4XX_TEX_SAMP_1_COMPARE_FUNC__SHIFT) & A4XX_TEX_SAMP_1_COMPARE_FUNC__MASK;  in A4XX_TEX_SAMP_1_COMPARE_FUNC()
4156 static inline uint32_t A4XX_TEX_SAMP_1_MAX_LOD(float val)  in A4XX_TEX_SAMP_1_MAX_LOD()  argument
4158 …return ((((uint32_t)(val * 256.0))) << A4XX_TEX_SAMP_1_MAX_LOD__SHIFT) & A4XX_TEX_SAMP_1_MAX_LOD__…  in A4XX_TEX_SAMP_1_MAX_LOD()
4162 static inline uint32_t A4XX_TEX_SAMP_1_MIN_LOD(float val)  in A4XX_TEX_SAMP_1_MIN_LOD()  argument
4164 …return ((((uint32_t)(val * 256.0))) << A4XX_TEX_SAMP_1_MIN_LOD__SHIFT) & A4XX_TEX_SAMP_1_MIN_LOD__…  in A4XX_TEX_SAMP_1_MIN_LOD()
4172 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_X(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_X()  argument
4174 	return ((val) << A4XX_TEX_CONST_0_SWIZ_X__SHIFT) & A4XX_TEX_CONST_0_SWIZ_X__MASK;  in A4XX_TEX_CONST_0_SWIZ_X()
4178 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_Y(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_Y()  argument
4180 	return ((val) << A4XX_TEX_CONST_0_SWIZ_Y__SHIFT) & A4XX_TEX_CONST_0_SWIZ_Y__MASK;  in A4XX_TEX_CONST_0_SWIZ_Y()
4184 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_Z(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_Z()  argument
4186 	return ((val) << A4XX_TEX_CONST_0_SWIZ_Z__SHIFT) & A4XX_TEX_CONST_0_SWIZ_Z__MASK;  in A4XX_TEX_CONST_0_SWIZ_Z()
4190 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_W(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_W()  argument
4192 	return ((val) << A4XX_TEX_CONST_0_SWIZ_W__SHIFT) & A4XX_TEX_CONST_0_SWIZ_W__MASK;  in A4XX_TEX_CONST_0_SWIZ_W()
4196 static inline uint32_t A4XX_TEX_CONST_0_MIPLVLS(uint32_t val)  in A4XX_TEX_CONST_0_MIPLVLS()  argument
4198 	return ((val) << A4XX_TEX_CONST_0_MIPLVLS__SHIFT) & A4XX_TEX_CONST_0_MIPLVLS__MASK;  in A4XX_TEX_CONST_0_MIPLVLS()
4202 static inline uint32_t A4XX_TEX_CONST_0_FMT(enum a4xx_tex_fmt val)  in A4XX_TEX_CONST_0_FMT()  argument
4204 	return ((val) << A4XX_TEX_CONST_0_FMT__SHIFT) & A4XX_TEX_CONST_0_FMT__MASK;  in A4XX_TEX_CONST_0_FMT()
4208 static inline uint32_t A4XX_TEX_CONST_0_TYPE(enum a4xx_tex_type val)  in A4XX_TEX_CONST_0_TYPE()  argument
4210 	return ((val) << A4XX_TEX_CONST_0_TYPE__SHIFT) & A4XX_TEX_CONST_0_TYPE__MASK;  in A4XX_TEX_CONST_0_TYPE()
4216 static inline uint32_t A4XX_TEX_CONST_1_HEIGHT(uint32_t val)  in A4XX_TEX_CONST_1_HEIGHT()  argument
4218 	return ((val) << A4XX_TEX_CONST_1_HEIGHT__SHIFT) & A4XX_TEX_CONST_1_HEIGHT__MASK;  in A4XX_TEX_CONST_1_HEIGHT()
4222 static inline uint32_t A4XX_TEX_CONST_1_WIDTH(uint32_t val)  in A4XX_TEX_CONST_1_WIDTH()  argument
4224 	return ((val) << A4XX_TEX_CONST_1_WIDTH__SHIFT) & A4XX_TEX_CONST_1_WIDTH__MASK;  in A4XX_TEX_CONST_1_WIDTH()
4230 static inline uint32_t A4XX_TEX_CONST_2_PITCHALIGN(uint32_t val)  in A4XX_TEX_CONST_2_PITCHALIGN()  argument
4232 	return ((val) << A4XX_TEX_CONST_2_PITCHALIGN__SHIFT) & A4XX_TEX_CONST_2_PITCHALIGN__MASK;  in A4XX_TEX_CONST_2_PITCHALIGN()
4237 static inline uint32_t A4XX_TEX_CONST_2_PITCH(uint32_t val)  in A4XX_TEX_CONST_2_PITCH()  argument
4239 	return ((val) << A4XX_TEX_CONST_2_PITCH__SHIFT) & A4XX_TEX_CONST_2_PITCH__MASK;  in A4XX_TEX_CONST_2_PITCH()
4243 static inline uint32_t A4XX_TEX_CONST_2_SWAP(enum a3xx_color_swap val)  in A4XX_TEX_CONST_2_SWAP()  argument
4245 	return ((val) << A4XX_TEX_CONST_2_SWAP__SHIFT) & A4XX_TEX_CONST_2_SWAP__MASK;  in A4XX_TEX_CONST_2_SWAP()
4251 static inline uint32_t A4XX_TEX_CONST_3_LAYERSZ(uint32_t val)  in A4XX_TEX_CONST_3_LAYERSZ()  argument
4253 	return ((val >> 12) << A4XX_TEX_CONST_3_LAYERSZ__SHIFT) & A4XX_TEX_CONST_3_LAYERSZ__MASK;  in A4XX_TEX_CONST_3_LAYERSZ()
4257 static inline uint32_t A4XX_TEX_CONST_3_DEPTH(uint32_t val)  in A4XX_TEX_CONST_3_DEPTH()  argument
4259 	return ((val) << A4XX_TEX_CONST_3_DEPTH__SHIFT) & A4XX_TEX_CONST_3_DEPTH__MASK;  in A4XX_TEX_CONST_3_DEPTH()
4265 static inline uint32_t A4XX_TEX_CONST_4_LAYERSZ(uint32_t val)  in A4XX_TEX_CONST_4_LAYERSZ()  argument
4267 	return ((val >> 12) << A4XX_TEX_CONST_4_LAYERSZ__SHIFT) & A4XX_TEX_CONST_4_LAYERSZ__MASK;  in A4XX_TEX_CONST_4_LAYERSZ()
4271 static inline uint32_t A4XX_TEX_CONST_4_BASE(uint32_t val)  in A4XX_TEX_CONST_4_BASE()  argument
4273 	return ((val >> 5) << A4XX_TEX_CONST_4_BASE__SHIFT) & A4XX_TEX_CONST_4_BASE__MASK;  in A4XX_TEX_CONST_4_BASE()
4285 static inline uint32_t A4XX_SSBO_0_0_BASE(uint32_t val)  in A4XX_SSBO_0_0_BASE()  argument
4287 	return ((val >> 5) << A4XX_SSBO_0_0_BASE__SHIFT) & A4XX_SSBO_0_0_BASE__MASK;  in A4XX_SSBO_0_0_BASE()
4293 static inline uint32_t A4XX_SSBO_0_1_PITCH(uint32_t val)  in A4XX_SSBO_0_1_PITCH()  argument
4295 	return ((val) << A4XX_SSBO_0_1_PITCH__SHIFT) & A4XX_SSBO_0_1_PITCH__MASK;  in A4XX_SSBO_0_1_PITCH()
4301 static inline uint32_t A4XX_SSBO_0_2_ARRAY_PITCH(uint32_t val)  in A4XX_SSBO_0_2_ARRAY_PITCH()  argument
4303 	return ((val >> 12) << A4XX_SSBO_0_2_ARRAY_PITCH__SHIFT) & A4XX_SSBO_0_2_ARRAY_PITCH__MASK;  in A4XX_SSBO_0_2_ARRAY_PITCH()
4309 static inline uint32_t A4XX_SSBO_0_3_CPP(uint32_t val)  in A4XX_SSBO_0_3_CPP()  argument
4311 	return ((val) << A4XX_SSBO_0_3_CPP__SHIFT) & A4XX_SSBO_0_3_CPP__MASK;  in A4XX_SSBO_0_3_CPP()
4317 static inline uint32_t A4XX_SSBO_1_0_CPP(uint32_t val)  in A4XX_SSBO_1_0_CPP()  argument
4319 	return ((val) << A4XX_SSBO_1_0_CPP__SHIFT) & A4XX_SSBO_1_0_CPP__MASK;  in A4XX_SSBO_1_0_CPP()
4323 static inline uint32_t A4XX_SSBO_1_0_FMT(enum a4xx_color_fmt val)  in A4XX_SSBO_1_0_FMT()  argument
4325 	return ((val) << A4XX_SSBO_1_0_FMT__SHIFT) & A4XX_SSBO_1_0_FMT__MASK;  in A4XX_SSBO_1_0_FMT()
4329 static inline uint32_t A4XX_SSBO_1_0_WIDTH(uint32_t val)  in A4XX_SSBO_1_0_WIDTH()  argument
4331 	return ((val) << A4XX_SSBO_1_0_WIDTH__SHIFT) & A4XX_SSBO_1_0_WIDTH__MASK;  in A4XX_SSBO_1_0_WIDTH()
4337 static inline uint32_t A4XX_SSBO_1_1_HEIGHT(uint32_t val)  in A4XX_SSBO_1_1_HEIGHT()  argument
4339 	return ((val) << A4XX_SSBO_1_1_HEIGHT__SHIFT) & A4XX_SSBO_1_1_HEIGHT__MASK;  in A4XX_SSBO_1_1_HEIGHT()
4343 static inline uint32_t A4XX_SSBO_1_1_DEPTH(uint32_t val)  in A4XX_SSBO_1_1_DEPTH()  argument
4345 	return ((val) << A4XX_SSBO_1_1_DEPTH__SHIFT) & A4XX_SSBO_1_1_DEPTH__MASK;  in A4XX_SSBO_1_1_DEPTH()