392 	u32 reg_adr;  in mipi_tx_fg_section_cfg_regs()  local
427 	reg_adr =  in mipi_tx_fg_section_cfg_regs()
430 	kmb_write_bits_mipi(kmb_dsi, reg_adr, (section % 2) * 16, 16,  in mipi_tx_fg_section_cfg_regs()
437 	reg_adr = MIPI_TXm_HS_FGn_SECTo_LINE_CFG(ctrl_no, frame_id, section);  in mipi_tx_fg_section_cfg_regs()
438 	kmb_write_mipi(kmb_dsi, reg_adr, height_lines);  in mipi_tx_fg_section_cfg_regs()
495 	u32 ctrl_no = MIPI_CTRL6, reg_adr, val, offset;  in mipi_tx_fg_cfg_regs()  local
523 	reg_adr = MIPI_TXm_HS_FGn_NUM_LINES(ctrl_no, frame_gen);  in mipi_tx_fg_cfg_regs()
524 	kmb_write_mipi(kmb_dsi, reg_adr, fg_cfg->v_active);  in mipi_tx_fg_cfg_regs()
533 	reg_adr = MIPI_TXm_HS_VSYNC_WIDTHn(ctrl_no, frame_gen / 2);  in mipi_tx_fg_cfg_regs()
534 	kmb_write_bits_mipi(kmb_dsi, reg_adr, offset, 16, fg_cfg->vsync_width);  in mipi_tx_fg_cfg_regs()
537 	reg_adr = MIPI_TXm_HS_V_BACKPORCHESn(ctrl_no, frame_gen / 2);  in mipi_tx_fg_cfg_regs()
538 	kmb_write_bits_mipi(kmb_dsi, reg_adr, offset, 16, fg_cfg->v_backporch);  in mipi_tx_fg_cfg_regs()
541 	reg_adr = MIPI_TXm_HS_V_FRONTPORCHESn(ctrl_no, frame_gen / 2);  in mipi_tx_fg_cfg_regs()
542 	kmb_write_bits_mipi(kmb_dsi, reg_adr, offset, 16, fg_cfg->v_frontporch);  in mipi_tx_fg_cfg_regs()
545 	reg_adr = MIPI_TXm_HS_V_ACTIVEn(ctrl_no, frame_gen / 2);  in mipi_tx_fg_cfg_regs()
546 	kmb_write_bits_mipi(kmb_dsi, reg_adr, offset, 16, fg_cfg->v_active);  in mipi_tx_fg_cfg_regs()
549 	reg_adr = MIPI_TXm_HS_HSYNC_WIDTHn(ctrl_no, frame_gen);  in mipi_tx_fg_cfg_regs()
550 	kmb_write_mipi(kmb_dsi, reg_adr,  in mipi_tx_fg_cfg_regs()
554 	reg_adr = MIPI_TXm_HS_H_BACKPORCHn(ctrl_no, frame_gen);  in mipi_tx_fg_cfg_regs()
555 	kmb_write_mipi(kmb_dsi, reg_adr,  in mipi_tx_fg_cfg_regs()
559 	reg_adr = MIPI_TXm_HS_H_FRONTPORCHn(ctrl_no, frame_gen);  in mipi_tx_fg_cfg_regs()
560 	kmb_write_mipi(kmb_dsi, reg_adr,  in mipi_tx_fg_cfg_regs()
564 	reg_adr = MIPI_TXm_HS_H_ACTIVEn(ctrl_no, frame_gen);  in mipi_tx_fg_cfg_regs()
570 	kmb_write_mipi(kmb_dsi, reg_adr, val);  in mipi_tx_fg_cfg_regs()
573 	reg_adr = MIPI_TXm_HS_LLP_HSYNC_WIDTHn(ctrl_no, frame_gen);  in mipi_tx_fg_cfg_regs()
574 	kmb_write_mipi(kmb_dsi, reg_adr, fg_cfg->hsync_width * (fg_cfg->bpp / 8));  in mipi_tx_fg_cfg_regs()
577 	reg_adr = MIPI_TXm_HS_LLP_H_BACKPORCHn(ctrl_no, frame_gen);  in mipi_tx_fg_cfg_regs()
578 	kmb_write_mipi(kmb_dsi, reg_adr, fg_cfg->h_backporch * (fg_cfg->bpp / 8));  in mipi_tx_fg_cfg_regs()
581 	reg_adr = MIPI_TXm_HS_LLP_H_FRONTPORCHn(ctrl_no, frame_gen);  in mipi_tx_fg_cfg_regs()
582 	kmb_write_mipi(kmb_dsi, reg_adr,  in mipi_tx_fg_cfg_regs()