97 	if (!spin->batch) {  in igt_spinner_pin()
105 		spin->batch = vaddr;  in igt_spinner_pin()
147 	u32 *batch;  in igt_spinner_create_request()  local
155 	if (!spin->batch) {  in igt_spinner_create_request()
176 	batch = spin->batch;  in igt_spinner_create_request()
179 		*batch++ = MI_STORE_DWORD_IMM_GEN4;  in igt_spinner_create_request()
180 		*batch++ = lower_32_bits(hws_address(hws, rq));  in igt_spinner_create_request()
181 		*batch++ = upper_32_bits(hws_address(hws, rq));  in igt_spinner_create_request()
183 		*batch++ = MI_STORE_DWORD_IMM_GEN4;  in igt_spinner_create_request()
184 		*batch++ = 0;  in igt_spinner_create_request()
185 		*batch++ = hws_address(hws, rq);  in igt_spinner_create_request()
187 		*batch++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;  in igt_spinner_create_request()
188 		*batch++ = 0;  in igt_spinner_create_request()
189 		*batch++ = hws_address(hws, rq);  in igt_spinner_create_request()
191 		*batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;  in igt_spinner_create_request()
192 		*batch++ = hws_address(hws, rq);  in igt_spinner_create_request()
194 	*batch++ = rq->fence.seqno;  in igt_spinner_create_request()
196 	*batch++ = arbitration_command;  in igt_spinner_create_request()
199 		*batch++ = MI_BATCH_BUFFER_START | BIT(8) | 1;  in igt_spinner_create_request()
201 		*batch++ = MI_BATCH_BUFFER_START | MI_BATCH_PPGTT_HSW;  in igt_spinner_create_request()
203 		*batch++ = MI_BATCH_BUFFER_START;  in igt_spinner_create_request()
205 		*batch++ = MI_BATCH_BUFFER_START | MI_BATCH_GTT;  in igt_spinner_create_request()
206 	*batch++ = lower_32_bits(vma->node.start);  in igt_spinner_create_request()
207 	*batch++ = upper_32_bits(vma->node.start);  in igt_spinner_create_request()
209 	*batch++ = MI_BATCH_BUFFER_END; /* not reached */  in igt_spinner_create_request()
242 	if (!spin->batch)  in igt_spinner_end()
245 	*spin->batch = MI_BATCH_BUFFER_END;  in igt_spinner_end()
253 	if (spin->batch) {  in igt_spinner_fini()