21 static u32 *pxp_emit_session_selection(u32 *cs, u32 idx)  in pxp_emit_session_selection()  argument
23 	*cs++ = MFX_WAIT_PXP;  in pxp_emit_session_selection()
26 	*cs++ = MI_FLUSH_DW;  in pxp_emit_session_selection()
27 	*cs++ = 0;  in pxp_emit_session_selection()
28 	*cs++ = 0;  in pxp_emit_session_selection()
31 	*cs++ = MI_SET_APPID | MI_SET_APPID_SESSION_ID(idx);  in pxp_emit_session_selection()
33 	*cs++ = MFX_WAIT_PXP;  in pxp_emit_session_selection()
36 	*cs++ = MI_FLUSH_DW | MI_FLUSH_DW_PROTECTED_MEM_EN |  in pxp_emit_session_selection()
38 	*cs++ = I915_GEM_HWS_PXP_ADDR | MI_FLUSH_DW_USE_GTT;  in pxp_emit_session_selection()
39 	*cs++ = 0;  in pxp_emit_session_selection()
41 	*cs++ = MFX_WAIT_PXP;  in pxp_emit_session_selection()
43 	return cs;  in pxp_emit_session_selection()
46 static u32 *pxp_emit_inline_termination(u32 *cs)  in pxp_emit_inline_termination()  argument
49 	*cs++ = CRYPTO_KEY_EXCHANGE;  in pxp_emit_inline_termination()
50 	*cs++ = 0;  in pxp_emit_inline_termination()
52 	return cs;  in pxp_emit_inline_termination()
55 static u32 *pxp_emit_session_termination(u32 *cs, u32 idx)  in pxp_emit_session_termination()  argument
57 	cs = pxp_emit_session_selection(cs, idx);  in pxp_emit_session_termination()
58 	cs = pxp_emit_inline_termination(cs);  in pxp_emit_session_termination()
60 	return cs;  in pxp_emit_session_termination()
63 static u32 *pxp_emit_wait(u32 *cs)  in pxp_emit_wait()  argument
66 	*cs++ = MFX_WAIT_PXP;  in pxp_emit_wait()
67 	*cs++ = 0;  in pxp_emit_wait()
69 	return cs;  in pxp_emit_wait()
99 	u32 *cs;  in intel_pxp_terminate_session()  local
115 	cs = intel_ring_begin(rq, SESSION_TERMINATION_LEN(1) + WAIT_LEN);  in intel_pxp_terminate_session()
116 	if (IS_ERR(cs)) {  in intel_pxp_terminate_session()
117 		err = PTR_ERR(cs);  in intel_pxp_terminate_session()
121 	cs = pxp_emit_session_termination(cs, id);  in intel_pxp_terminate_session()
122 	cs = pxp_emit_wait(cs);  in intel_pxp_terminate_session()
124 	intel_ring_advance(rq, cs);  in intel_pxp_terminate_session()