110 #define vgpu_cfg_space(vgpu) ((vgpu)->cfg_space.virtual_cfg_space)  argument
124 #define vgpu_opregion(vgpu) (&(vgpu->opregion))  argument
425 #define vgpu_aperture_offset(vgpu)	((vgpu)->gm.low_gm_node.start)  argument
426 #define vgpu_hidden_offset(vgpu)	((vgpu)->gm.high_gm_node.start)  argument
427 #define vgpu_aperture_sz(vgpu)		((vgpu)->gm.aperture_sz)  argument
428 #define vgpu_hidden_sz(vgpu)		((vgpu)->gm.hidden_sz)  argument
430 #define vgpu_aperture_pa_base(vgpu) \  argument
433 #define vgpu_ggtt_gm_sz(vgpu) ((vgpu)->gm.aperture_sz + (vgpu)->gm.hidden_sz)  argument
435 #define vgpu_aperture_pa_end(vgpu) \  argument
438 #define vgpu_aperture_gmadr_base(vgpu) (vgpu_aperture_offset(vgpu))  argument
439 #define vgpu_aperture_gmadr_end(vgpu) \  argument
442 #define vgpu_hidden_gmadr_base(vgpu) (vgpu_hidden_offset(vgpu))  argument
443 #define vgpu_hidden_gmadr_end(vgpu) \  argument
446 #define vgpu_fence_base(vgpu) (vgpu->fence.base)  argument
447 #define vgpu_fence_sz(vgpu) (vgpu->fence.size)  argument
461 #define vgpu_vreg_t(vgpu, reg) \  argument
463 #define vgpu_vreg(vgpu, offset) \  argument
465 #define vgpu_vreg64_t(vgpu, reg) \  argument
467 #define vgpu_vreg64(vgpu, offset) \  argument
470 #define for_each_active_vgpu(gvt, vgpu, id) \  argument
474 static inline void intel_vgpu_write_pci_bar(struct intel_vgpu *vgpu,  in intel_vgpu_write_pci_bar()
513 #define vgpu_gmadr_is_aperture(vgpu, gmadr) \  argument
517 #define vgpu_gmadr_is_hidden(vgpu, gmadr) \  argument
521 #define vgpu_gmadr_is_valid(vgpu, gmadr) \  argument
557 static inline u64 intel_vgpu_get_bar_gpa(struct intel_vgpu *vgpu, int bar)  in intel_vgpu_get_bar_gpa()
727 static inline int intel_gvt_read_gpa(struct intel_vgpu *vgpu, unsigned long gpa,  in intel_gvt_read_gpa()
745 static inline int intel_gvt_write_gpa(struct intel_vgpu *vgpu,  in intel_gvt_write_gpa()