Lines Matching refs:ast_mindwm
113 u32 ast_mindwm(struct ast_private *ast, u32 r) in ast_mindwm() function
173 data = ast_mindwm(ast, 0x1e6e0070) & 0x40; in mmctestburst2_ast2150()
183 data = ast_mindwm(ast, 0x1e6e0070) & 0x40; in mmctestburst2_ast2150()
189 data = (ast_mindwm(ast, 0x1e6e0070) & 0x80) >> 7; in mmctestburst2_ast2150()
203 data = ast_mindwm(ast, 0x1e6e0070) & 0x40;
209 data = (ast_mindwm(ast, 0x1e6e0070) & 0x80) >> 7;
460 data = ast_mindwm(ast, 0x1e6e0070) & 0x3000; in mmc_test()
480 data = ast_mindwm(ast, 0x1e6e0070) & 0x1000; in mmc_test2()
486 data = ast_mindwm(ast, 0x1e6e0078); in mmc_test2()
726 reg_mcr0c = ast_mindwm(ast, 0x1E6E000C); in finetuneDQSI()
727 reg_mcr18 = ast_mindwm(ast, 0x1E6E0018); in finetuneDQSI()
859 ast_moutdwm(ast, 0x1E6E0068, ast_mindwm(ast, 0x1E720058) | (dlli << 16)); in cbr_dll2()
870 trap = (ast_mindwm(ast, 0x1E6E2070) >> 25) & 0x3; in get_ddr3_info()
1147 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1149 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1152 data2 = (ast_mindwm(ast, 0x1E6E0064) & 0xfff3ffff) + 4; in ddr3_init()
1162 data = ast_mindwm(ast, 0x1E6E0068) & 0xffff00ff; in ddr3_init()
1167 ast_moutdwm(ast, 0x1E6E0064, ast_mindwm(ast, 0x1E6E0064) | 0xC0000); in ddr3_init()
1169 data = ast_mindwm(ast, 0x1E6E0018) & 0xfffff1ff; in ddr3_init()
1174 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1177 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1180 ast_moutdwm(ast, 0x1E720058, ast_mindwm(ast, 0x1E6E0068) & 0xffff); in ddr3_init()
1181 data = ast_mindwm(ast, 0x1E6E0018) | 0xC00; in ddr3_init()
1218 data = ast_mindwm(ast, 0x1E6E0070); in ddr3_init()
1235 trap = (ast_mindwm(ast, 0x1E6E2070) >> 25) & 0x3; in get_ddr2_info()
1516 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1518 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1521 data2 = (ast_mindwm(ast, 0x1E6E0064) & 0xfff3ffff) + 4; in ddr2_init()
1531 data = ast_mindwm(ast, 0x1E6E0068) & 0xffff00ff; in ddr2_init()
1536 ast_moutdwm(ast, 0x1E6E0064, ast_mindwm(ast, 0x1E6E0064) | 0xC0000); in ddr2_init()
1538 data = ast_mindwm(ast, 0x1E6E0018) & 0xfffff1ff; in ddr2_init()
1543 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1546 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1549 ast_moutdwm(ast, 0x1E720058, ast_mindwm(ast, 0x1E6E0008) & 0xffff); in ddr2_init()
1550 data = ast_mindwm(ast, 0x1E6E0018) | 0xC00; in ddr2_init()
1592 data = ast_mindwm(ast, 0x1E6E0070); in ddr2_init()
1629 temp = ast_mindwm(ast, 0x1e6e2070); in ast_post_chip_2300()
1674 temp = ast_mindwm(ast, 0x1e6e2040); in ast_post_chip_2300()
1743 data = ast_mindwm(ast, 0x1E6E0060) & 0x1; in ddr_phy_init_2500()
1748 data = ast_mindwm(ast, 0x1E6E0300) & 0x000A0000; in ddr_phy_init_2500()
1773 reg_04 = ast_mindwm(ast, 0x1E6E0004) & 0xfffffffc; in check_dram_size_2500()
1774 reg_14 = ast_mindwm(ast, 0x1E6E0014) & 0xffffff00; in check_dram_size_2500()
1782 if (ast_mindwm(ast, 0xA0100000) == 0x41424344) { in check_dram_size_2500()
1786 } else if (ast_mindwm(ast, 0x90100000) == 0x35363738) { in check_dram_size_2500()
1790 } else if (ast_mindwm(ast, 0x88100000) == 0x292A2B2C) { in check_dram_size_2500()
1804 reg_04 = ast_mindwm(ast, 0x1E6E0004); in enable_cache_2500()
1808 data = ast_mindwm(ast, 0x1E6E0004); in enable_cache_2500()
1827 data = ast_mindwm(ast, 0x1E6E2070) & 0x00800000; in set_mpll_2500()
1947 data = ast_mindwm(ast, 0x1E6E03D0); in ddr4_init_2500()
2017 data = ast_mindwm(ast, 0x1E6E2070); in ast_dram_init_2500()
2024 ast_moutdwm(ast, 0x1E6E2040, ast_mindwm(ast, 0x1E6E2040) | 0x41); in ast_dram_init_2500()
2027 data = ast_mindwm(ast, 0x1E6E200C) & 0xF9FFFFFF; in ast_dram_init_2500()
2042 data = ast_mindwm(ast, 0x1e6e2070); in ast_patch_ahb_2500()
2062 data = ast_mindwm(ast, 0x1e6e2000); in ast_patch_ahb_2500()
2097 if (ast_mindwm(ast, 0x1E6E2070) & 0x00800000) { in ast_post_chip_2500()
2103 temp = ast_mindwm(ast, 0x1E6E2070); in ast_post_chip_2500()
2115 temp = ast_mindwm(ast, 0x1e6e2040); in ast_post_chip_2500()