912 	hwmgr->platform_descriptor.clockStep.engineClock = 500;  in vega10_hwmgr_backend_init()
1355 	if (hwmgr->platform_descriptor.overdriveLimit.engineClock == 0)  in vega10_setup_default_dpm_tables()
1356 		hwmgr->platform_descriptor.overdriveLimit.engineClock =  in vega10_setup_default_dpm_tables()
1616 			hwmgr->platform_descriptor.overdriveLimit.engineClock;  in vega10_populate_single_gfx_level()
3284 	minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock;  in vega10_apply_state_adjust_rules()
3315 		minimum_clocks.engineClock = stable_pstate_sclk;  in vega10_apply_state_adjust_rules()
3337 	if (sclk < minimum_clocks.engineClock)  in vega10_apply_state_adjust_rules()
3338 		sclk = (minimum_clocks.engineClock > max_limits->sclk) ?  in vega10_apply_state_adjust_rules()
3339 				max_limits->sclk : minimum_clocks.engineClock;  in vega10_apply_state_adjust_rules()
4759 				hwmgr->platform_descriptor.overdriveLimit.engineClock/100);  in vega10_emit_clock_levels()
4891 				hwmgr->platform_descriptor.overdriveLimit.engineClock/100);  in vega10_print_clock_levels()
5125 			hwmgr->platform_descriptor.overdriveLimit.engineClock) {  in vega10_set_sclk_od()
5128 				hwmgr->platform_descriptor.overdriveLimit.engineClock;  in vega10_set_sclk_od()
5130 				hwmgr->platform_descriptor.overdriveLimit.engineClock);  in vega10_set_sclk_od()
5357 			hwmgr->platform_descriptor.overdriveLimit.engineClock < clk) {  in vega10_check_clk_voltage_valid()
5360 				hwmgr->platform_descriptor.overdriveLimit.engineClock/100);  in vega10_check_clk_voltage_valid()