Lines Matching refs:powerplay_table
51 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_table_offset() argument
55 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_vce_table_offset()
58 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_vce_table_offset()
75 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_info_array_offset() argument
78 powerplay_table); in get_vce_clock_info_array_offset()
87 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_info_array_size() argument
90 powerplay_table); in get_vce_clock_info_array_size()
95 (((unsigned long) powerplay_table) + table_offset); in get_vce_clock_info_array_size()
103 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_voltage_limit_table_offset() argument
106 powerplay_table); in get_vce_clock_voltage_limit_table_offset()
110 powerplay_table); in get_vce_clock_voltage_limit_table_offset()
116 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_voltage_limit_table_size() argument
118 uint16_t table_offset = get_vce_clock_voltage_limit_table_offset(hwmgr, powerplay_table); in get_vce_clock_voltage_limit_table_size()
123 …(const ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *)(((unsigned long) powerplay_table) + table_offse… in get_vce_clock_voltage_limit_table_size()
130 …et_vce_state_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_state_table_offset() argument
132 uint16_t table_offset = get_vce_clock_voltage_limit_table_offset(hwmgr, powerplay_table); in get_vce_state_table_offset()
135 return table_offset + get_vce_clock_voltage_limit_table_size(hwmgr, powerplay_table); in get_vce_state_table_offset()
142 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_state_table() argument
144 uint16_t table_offset = get_vce_state_table_offset(hwmgr, powerplay_table); in get_vce_state_table()
147 return (const ATOM_PPLIB_VCE_State_Table *)(((unsigned long) powerplay_table) + table_offset); in get_vce_state_table()
153 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_uvd_table_offset() argument
157 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_uvd_table_offset()
160 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_uvd_table_offset()
175 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_uvd_clock_info_array_offset() argument
178 powerplay_table); in get_uvd_clock_info_array_offset()
186 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_uvd_clock_info_array_size() argument
189 powerplay_table); in get_uvd_clock_info_array_size()
194 (((unsigned long) powerplay_table) in get_uvd_clock_info_array_size()
205 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_uvd_clock_voltage_limit_table_offset() argument
208 powerplay_table); in get_uvd_clock_voltage_limit_table_offset()
212 get_uvd_clock_info_array_size(hwmgr, powerplay_table); in get_uvd_clock_voltage_limit_table_offset()
218 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_samu_table_offset() argument
222 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_samu_table_offset()
225 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_samu_table_offset()
242 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_samu_clock_voltage_limit_table_offset() argument
245 powerplay_table); in get_samu_clock_voltage_limit_table_offset()
254 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_acp_table_offset() argument
258 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_acp_table_offset()
261 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_acp_table_offset()
278 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_acp_clock_voltage_limit_table_offset() argument
280 uint16_t tableOffset = get_acp_table_offset(hwmgr, powerplay_table); in get_acp_clock_voltage_limit_table_offset()
290 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_cacp_tdp_table_offset() argument
294 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_cacp_tdp_table_offset()
297 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_cacp_tdp_table_offset()
341 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_sclk_vdd_gfx_table_offset() argument
345 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_sclk_vdd_gfx_table_offset()
348 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_sclk_vdd_gfx_table_offset()
366 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_sclk_vdd_gfx_clock_voltage_dependency_table_offset() argument
368 uint16_t tableOffset = get_sclk_vdd_gfx_table_offset(hwmgr, powerplay_table); in get_sclk_vdd_gfx_clock_voltage_dependency_table_offset()
867 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); in pp_tables_get_num_of_entries() local
869 if (powerplay_table == NULL) in pp_tables_get_num_of_entries()
872 if (powerplay_table->sHeader.ucTableFormatRevision >= 6) { in pp_tables_get_num_of_entries()
873 pstate_arrays = (StateArray *)(((unsigned long)powerplay_table) + in pp_tables_get_num_of_entries()
874 le16_to_cpu(powerplay_table->usStateArrayOffset)); in pp_tables_get_num_of_entries()
878 *num_of_entries = (unsigned long)(powerplay_table->ucNumStates); in pp_tables_get_num_of_entries()
892 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); in pp_tables_get_entry() local
902 if (powerplay_table == NULL) in pp_tables_get_entry()
907 if (powerplay_table->sHeader.ucTableFormatRevision >= 6) { in pp_tables_get_entry()
908 pstate_arrays = (StateArray *)(((unsigned long)powerplay_table) + in pp_tables_get_entry()
909 le16_to_cpu(powerplay_table->usStateArrayOffset)); in pp_tables_get_entry()
915 pclock_arrays = (ClockInfoArray *)(((unsigned long)powerplay_table) + in pp_tables_get_entry()
916 le16_to_cpu(powerplay_table->usClockInfoArrayOffset)); in pp_tables_get_entry()
918 pnon_clock_arrays = (NonClockInfoArray *)(((unsigned long)powerplay_table) + in pp_tables_get_entry()
919 le16_to_cpu(powerplay_table->usNonClockInfoArrayOffset)); in pp_tables_get_entry()
935 if (entry_index > powerplay_table->ucNumStates) in pp_tables_get_entry()
938 pstate_entry = (ATOM_PPLIB_STATE *)((unsigned long)powerplay_table + in pp_tables_get_entry()
939 le16_to_cpu(powerplay_table->usStateArrayOffset) + in pp_tables_get_entry()
940 entry_index * powerplay_table->ucStateEntrySize); in pp_tables_get_entry()
942 pnon_clock_info = (ATOM_PPLIB_NONCLOCK_INFO *)((unsigned long)powerplay_table + in pp_tables_get_entry()
943 le16_to_cpu(powerplay_table->usNonClockInfoArrayOffset) + in pp_tables_get_entry()
945 powerplay_table->ucNonClockSize); in pp_tables_get_entry()
948 powerplay_table->ucNonClockSize, in pp_tables_get_entry()
951 for (i = 0; i < powerplay_table->ucStateEntrySize-1; i++) { in pp_tables_get_entry()
952 const void *pclock_info = (const void *)((unsigned long)powerplay_table + in pp_tables_get_entry()
953 le16_to_cpu(powerplay_table->usClockInfoArrayOffset) + in pp_tables_get_entry()
955 powerplay_table->ucClockInfoSize); in pp_tables_get_entry()
974 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table in init_powerplay_tables() argument
983 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in init_thermal_controller() argument
988 powerplay_table->sThermalController.ucType; in init_thermal_controller()
990 powerplay_table->sThermalController.ucI2cLine; in init_thermal_controller()
992 powerplay_table->sThermalController.ucI2cAddress; in init_thermal_controller()
995 (0 != (powerplay_table->sThermalController.ucFanParameters & in init_thermal_controller()
999 powerplay_table->sThermalController.ucFanParameters & in init_thermal_controller()
1003 = powerplay_table->sThermalController.ucFanMinRPM * 100UL; in init_thermal_controller()
1005 = powerplay_table->sThermalController.ucFanMaxRPM * 100UL; in init_thermal_controller()
1011 if (powerplay_table->usTableSize >= sizeof(ATOM_PPLIB_POWERPLAYTABLE3)) { in init_thermal_controller()
1013 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in init_thermal_controller()
1020 (const ATOM_PPLIB_FANTABLE *)(((unsigned long)powerplay_table) + in init_thermal_controller()
1047 (const ATOM_PPLIB_FANTABLE2 *)(((unsigned long)powerplay_table) + in init_thermal_controller()
1055 (const ATOM_PPLIB_FANTABLE3 *) (((unsigned long)powerplay_table) + in init_thermal_controller()
1077 (const ATOM_PPLIB_FANTABLE4 *)(((unsigned long)powerplay_table) + in init_thermal_controller()
1089 (const ATOM_PPLIB_FANTABLE5 *)(((unsigned long)powerplay_table) + in init_thermal_controller()
1114 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table, in init_overdrive_limits_V1_4() argument
1137 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table, in init_overdrive_limits_V2_1() argument
1143 if (le16_to_cpu(powerplay_table->usTableSize) < in init_overdrive_limits_V2_1()
1147 powerplay_table3 = (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in init_overdrive_limits_V2_1()
1152 header = (ATOM_PPLIB_EXTENDEDHEADER *)(((unsigned long) powerplay_table) + in init_overdrive_limits_V2_1()
1167 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in init_overdrive_limits() argument
1192 powerplay_table, in init_overdrive_limits()
1198 powerplay_table, in init_overdrive_limits()
1314 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in init_clock_voltage_dependency() argument
1337 hwmgr, powerplay_table); in init_clock_voltage_dependency()
1339 powerplay_table); in init_clock_voltage_dependency()
1342 (((unsigned long) powerplay_table) + in init_clock_voltage_dependency()
1346 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1352 uvd_clock_info_array_offset = get_uvd_clock_info_array_offset(hwmgr, powerplay_table); in init_clock_voltage_dependency()
1353 table_offset = get_uvd_clock_voltage_limit_table_offset(hwmgr, powerplay_table); in init_clock_voltage_dependency()
1357 (((unsigned long) powerplay_table) + in init_clock_voltage_dependency()
1361 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1367 powerplay_table); in init_clock_voltage_dependency()
1372 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1378 powerplay_table); in init_clock_voltage_dependency()
1383 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1388 table_offset = get_cacp_tdp_table_offset(hwmgr, powerplay_table); in init_clock_voltage_dependency()
1390 UCHAR rev_id = *(UCHAR *)(((unsigned long)powerplay_table) + table_offset); in init_clock_voltage_dependency()
1395 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1404 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1411 if (le16_to_cpu(powerplay_table->usTableSize) >= in init_clock_voltage_dependency()
1414 (const ATOM_PPLIB_POWERPLAYTABLE4 *)powerplay_table; in init_clock_voltage_dependency()
1468 powerplay_table); in init_clock_voltage_dependency()
1472 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1538 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in init_dpm2_parameters() argument
1542 if (le16_to_cpu(powerplay_table->usTableSize) >= in init_dpm2_parameters()
1545 (const ATOM_PPLIB_POWERPLAYTABLE5 *)powerplay_table; in init_dpm2_parameters()
1594 (((unsigned long)powerplay_table) + in init_dpm2_parameters()
1601 (((unsigned long)powerplay_table) + table_offset); in init_dpm2_parameters()
1612 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in init_phase_shedding_table() argument
1614 if (le16_to_cpu(powerplay_table->usTableSize) >= in init_phase_shedding_table()
1617 (const ATOM_PPLIB_POWERPLAYTABLE4 *)powerplay_table; in init_phase_shedding_table()
1669 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); in get_vce_state_table_entry() local
1671 const ATOM_PPLIB_VCE_State_Table *vce_state_table = get_vce_state_table(hwmgr, powerplay_table); in get_vce_state_table_entry()
1673 …signed short vce_clock_info_array_offset = get_vce_clock_info_array_offset(hwmgr, powerplay_table); in get_vce_state_table_entry()
1675 …*vce_clock_info_array = (const VCEClockInfoArray *)(((unsigned long) powerplay_table) + vce_clock_… in get_vce_state_table_entry()
1677 const ClockInfoArray *clock_arrays = (ClockInfoArray *)(((unsigned long)powerplay_table) + in get_vce_state_table_entry()
1678 le16_to_cpu(powerplay_table->usClockInfoArrayOffset)); in get_vce_state_table_entry()
1700 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table; in pp_tables_initialize() local
1707 powerplay_table = get_powerplay_table(hwmgr); in pp_tables_initialize()
1709 result = init_powerplay_tables(hwmgr, powerplay_table); in pp_tables_initialize()
1715 le32_to_cpu(powerplay_table->ulPlatformCaps)); in pp_tables_initialize()
1720 result = init_thermal_controller(hwmgr, powerplay_table); in pp_tables_initialize()
1725 result = init_overdrive_limits(hwmgr, powerplay_table); in pp_tables_initialize()
1731 powerplay_table); in pp_tables_initialize()
1736 result = init_dpm2_parameters(hwmgr, powerplay_table); in pp_tables_initialize()
1741 result = init_phase_shedding_table(hwmgr, powerplay_table); in pp_tables_initialize()