Lines Matching refs:CM
45 SRI(CM_GAMUT_REMAP_CONTROL, CM, id),\
46 SRI(CM_GAMUT_REMAP_C11_C12, CM, id),\
47 SRI(CM_GAMUT_REMAP_C13_C14, CM, id),\
48 SRI(CM_GAMUT_REMAP_C21_C22, CM, id),\
49 SRI(CM_GAMUT_REMAP_C23_C24, CM, id),\
50 SRI(CM_GAMUT_REMAP_C31_C32, CM, id),\
51 SRI(CM_GAMUT_REMAP_C33_C34, CM, id),\
80 SRI(CM_ICSC_CONTROL, CM, id), \
81 SRI(CM_ICSC_C11_C12, CM, id), \
82 SRI(CM_ICSC_C33_C34, CM, id), \
83 SRI(CM_DGAM_RAMB_START_CNTL_B, CM, id), \
84 SRI(CM_DGAM_RAMB_START_CNTL_G, CM, id), \
85 SRI(CM_DGAM_RAMB_START_CNTL_R, CM, id), \
86 SRI(CM_DGAM_RAMB_SLOPE_CNTL_B, CM, id), \
87 SRI(CM_DGAM_RAMB_SLOPE_CNTL_G, CM, id), \
88 SRI(CM_DGAM_RAMB_SLOPE_CNTL_R, CM, id), \
89 SRI(CM_DGAM_RAMB_END_CNTL1_B, CM, id), \
90 SRI(CM_DGAM_RAMB_END_CNTL2_B, CM, id), \
91 SRI(CM_DGAM_RAMB_END_CNTL1_G, CM, id), \
92 SRI(CM_DGAM_RAMB_END_CNTL2_G, CM, id), \
93 SRI(CM_DGAM_RAMB_END_CNTL1_R, CM, id), \
94 SRI(CM_DGAM_RAMB_END_CNTL2_R, CM, id), \
95 SRI(CM_DGAM_RAMB_REGION_0_1, CM, id), \
96 SRI(CM_DGAM_RAMB_REGION_14_15, CM, id), \
97 SRI(CM_DGAM_RAMA_START_CNTL_B, CM, id), \
98 SRI(CM_DGAM_RAMA_START_CNTL_G, CM, id), \
99 SRI(CM_DGAM_RAMA_START_CNTL_R, CM, id), \
100 SRI(CM_DGAM_RAMA_SLOPE_CNTL_B, CM, id), \
101 SRI(CM_DGAM_RAMA_SLOPE_CNTL_G, CM, id), \
102 SRI(CM_DGAM_RAMA_SLOPE_CNTL_R, CM, id), \
103 SRI(CM_DGAM_RAMA_END_CNTL1_B, CM, id), \
104 SRI(CM_DGAM_RAMA_END_CNTL2_B, CM, id), \
105 SRI(CM_DGAM_RAMA_END_CNTL1_G, CM, id), \
106 SRI(CM_DGAM_RAMA_END_CNTL2_G, CM, id), \
107 SRI(CM_DGAM_RAMA_END_CNTL1_R, CM, id), \
108 SRI(CM_DGAM_RAMA_END_CNTL2_R, CM, id), \
109 SRI(CM_DGAM_RAMA_REGION_0_1, CM, id), \
110 SRI(CM_DGAM_RAMA_REGION_14_15, CM, id), \
111 SRI(CM_MEM_PWR_CTRL, CM, id), \
112 SRI(CM_DGAM_LUT_WRITE_EN_MASK, CM, id), \
113 SRI(CM_DGAM_LUT_INDEX, CM, id), \
114 SRI(CM_DGAM_LUT_DATA, CM, id), \
115 SRI(CM_CONTROL, CM, id), \
116 SRI(CM_DGAM_CONTROL, CM, id), \
117 SRI(CM_TEST_DEBUG_INDEX, CM, id), \
118 SRI(CM_TEST_DEBUG_DATA, CM, id), \
126 SRI(CM_HDR_MULT_COEF, CM, id)
132 SRI(CM_COMA_C11_C12, CM, id),\
133 SRI(CM_COMA_C33_C34, CM, id),\
134 SRI(CM_COMB_C11_C12, CM, id),\
135 SRI(CM_COMB_C33_C34, CM, id),\
136 SRI(CM_OCSC_CONTROL, CM, id), \
137 SRI(CM_OCSC_C11_C12, CM, id), \
138 SRI(CM_OCSC_C33_C34, CM, id), \
139 SRI(CM_BNS_VALUES_R, CM, id), \
140 SRI(CM_BNS_VALUES_G, CM, id), \
141 SRI(CM_BNS_VALUES_B, CM, id), \
142 SRI(CM_MEM_PWR_CTRL, CM, id), \
143 SRI(CM_RGAM_LUT_DATA, CM, id), \
144 SRI(CM_RGAM_LUT_WRITE_EN_MASK, CM, id),\
145 SRI(CM_RGAM_LUT_INDEX, CM, id), \
146 SRI(CM_RGAM_RAMB_START_CNTL_B, CM, id), \
147 SRI(CM_RGAM_RAMB_START_CNTL_G, CM, id), \
148 SRI(CM_RGAM_RAMB_START_CNTL_R, CM, id), \
149 SRI(CM_RGAM_RAMB_SLOPE_CNTL_B, CM, id), \
150 SRI(CM_RGAM_RAMB_SLOPE_CNTL_G, CM, id), \
151 SRI(CM_RGAM_RAMB_SLOPE_CNTL_R, CM, id), \
152 SRI(CM_RGAM_RAMB_END_CNTL1_B, CM, id), \
153 SRI(CM_RGAM_RAMB_END_CNTL2_B, CM, id), \
154 SRI(CM_RGAM_RAMB_END_CNTL1_G, CM, id), \
155 SRI(CM_RGAM_RAMB_END_CNTL2_G, CM, id), \
156 SRI(CM_RGAM_RAMB_END_CNTL1_R, CM, id), \
157 SRI(CM_RGAM_RAMB_END_CNTL2_R, CM, id), \
158 SRI(CM_RGAM_RAMB_REGION_0_1, CM, id), \
159 SRI(CM_RGAM_RAMB_REGION_32_33, CM, id), \
160 SRI(CM_RGAM_RAMA_START_CNTL_B, CM, id), \
161 SRI(CM_RGAM_RAMA_START_CNTL_G, CM, id), \
162 SRI(CM_RGAM_RAMA_START_CNTL_R, CM, id), \
163 SRI(CM_RGAM_RAMA_SLOPE_CNTL_B, CM, id), \
164 SRI(CM_RGAM_RAMA_SLOPE_CNTL_G, CM, id), \
165 SRI(CM_RGAM_RAMA_SLOPE_CNTL_R, CM, id), \
166 SRI(CM_RGAM_RAMA_END_CNTL1_B, CM, id), \
167 SRI(CM_RGAM_RAMA_END_CNTL2_B, CM, id), \
168 SRI(CM_RGAM_RAMA_END_CNTL1_G, CM, id), \
169 SRI(CM_RGAM_RAMA_END_CNTL2_G, CM, id), \
170 SRI(CM_RGAM_RAMA_END_CNTL1_R, CM, id), \
171 SRI(CM_RGAM_RAMA_END_CNTL2_R, CM, id), \
172 SRI(CM_RGAM_RAMA_REGION_0_1, CM, id), \
173 SRI(CM_RGAM_RAMA_REGION_32_33, CM, id), \
174 SRI(CM_RGAM_CONTROL, CM, id), \
175 SRI(CM_IGAM_CONTROL, CM, id), \
176 SRI(CM_IGAM_LUT_RW_CONTROL, CM, id), \
177 SRI(CM_IGAM_LUT_RW_INDEX, CM, id), \
178 SRI(CM_IGAM_LUT_SEQ_COLOR, CM, id), \
180 SRI(CM_CMOUT_CONTROL, CM, id)