Lines Matching refs:SRI
55 SRI(DC_ABM1_HG_SAMPLE_RATE, ABM, id), \
56 SRI(DC_ABM1_LS_SAMPLE_RATE, ABM, id), \
57 SRI(BL1_PWM_BL_UPDATE_SAMPLE_RATE, ABM, id), \
58 SRI(DC_ABM1_HG_MISC_CTRL, ABM, id), \
59 SRI(DC_ABM1_IPCSC_COEFF_SEL, ABM, id), \
60 SRI(BL1_PWM_CURRENT_ABM_LEVEL, ABM, id), \
61 SRI(BL1_PWM_TARGET_ABM_LEVEL, ABM, id), \
62 SRI(BL1_PWM_USER_LEVEL, ABM, id), \
63 SRI(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, ABM, id), \
64 SRI(DC_ABM1_HGLS_REG_READ_PROGRESS, ABM, id), \
65 SRI(DC_ABM1_ACE_OFFSET_SLOPE_0, ABM, id), \
66 SRI(DC_ABM1_ACE_THRES_12, ABM, id), \
87 SRI(DC_ABM1_HG_SAMPLE_RATE, ABM, id), \
88 SRI(DC_ABM1_LS_SAMPLE_RATE, ABM, id), \
89 SRI(BL1_PWM_BL_UPDATE_SAMPLE_RATE, ABM, id), \
90 SRI(DC_ABM1_HG_MISC_CTRL, ABM, id), \
91 SRI(DC_ABM1_IPCSC_COEFF_SEL, ABM, id), \
92 SRI(BL1_PWM_CURRENT_ABM_LEVEL, ABM, id), \
93 SRI(BL1_PWM_TARGET_ABM_LEVEL, ABM, id), \
94 SRI(BL1_PWM_USER_LEVEL, ABM, id), \
95 SRI(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, ABM, id), \
96 SRI(DC_ABM1_HGLS_REG_READ_PROGRESS, ABM, id), \
101 SRI(DC_ABM1_HG_SAMPLE_RATE, ABM, id), \
102 SRI(DC_ABM1_LS_SAMPLE_RATE, ABM, id), \
103 SRI(BL1_PWM_BL_UPDATE_SAMPLE_RATE, ABM, id), \
104 SRI(DC_ABM1_HG_MISC_CTRL, ABM, id), \
105 SRI(DC_ABM1_IPCSC_COEFF_SEL, ABM, id), \
106 SRI(BL1_PWM_CURRENT_ABM_LEVEL, ABM, id), \
107 SRI(BL1_PWM_TARGET_ABM_LEVEL, ABM, id), \
108 SRI(BL1_PWM_USER_LEVEL, ABM, id), \
109 SRI(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, ABM, id), \
110 SRI(DC_ABM1_HGLS_REG_READ_PROGRESS, ABM, id), \
111 SRI(DC_ABM1_ACE_OFFSET_SLOPE_0, ABM, id), \
112 SRI(DC_ABM1_ACE_THRES_12, ABM, id), \
117 SRI(DC_ABM1_HG_SAMPLE_RATE, ABM, id), \
118 SRI(DC_ABM1_LS_SAMPLE_RATE, ABM, id), \
119 SRI(BL1_PWM_BL_UPDATE_SAMPLE_RATE, ABM, id), \
120 SRI(DC_ABM1_HG_MISC_CTRL, ABM, id), \
121 SRI(DC_ABM1_IPCSC_COEFF_SEL, ABM, id), \
122 SRI(BL1_PWM_CURRENT_ABM_LEVEL, ABM, id), \
123 SRI(BL1_PWM_TARGET_ABM_LEVEL, ABM, id), \
124 SRI(BL1_PWM_USER_LEVEL, ABM, id), \
125 SRI(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, ABM, id), \
126 SRI(DC_ABM1_HGLS_REG_READ_PROGRESS, ABM, id), \
127 SRI(DC_ABM1_ACE_OFFSET_SLOPE_0, ABM, id), \
128 SRI(DC_ABM1_ACE_THRES_12, ABM, id), \
132 SRI(DC_ABM1_HG_SAMPLE_RATE, ABM, id), \
133 SRI(DC_ABM1_LS_SAMPLE_RATE, ABM, id), \
134 SRI(BL1_PWM_BL_UPDATE_SAMPLE_RATE, ABM, id), \
135 SRI(DC_ABM1_HG_MISC_CTRL, ABM, id), \
136 SRI(DC_ABM1_IPCSC_COEFF_SEL, ABM, id), \
137 SRI(BL1_PWM_CURRENT_ABM_LEVEL, ABM, id), \
138 SRI(BL1_PWM_TARGET_ABM_LEVEL, ABM, id), \
139 SRI(BL1_PWM_USER_LEVEL, ABM, id), \
140 SRI(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, ABM, id), \
141 SRI(DC_ABM1_HGLS_REG_READ_PROGRESS, ABM, id), \
142 SRI(DC_ABM1_ACE_OFFSET_SLOPE_0, ABM, id), \
143 SRI(DC_ABM1_ACE_THRES_12, ABM, id), \