273 	      RREG32_SOC15(VCN, 0, mmUVD_STATUS)))  in vcn_v2_0_hw_fini()
495 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v2_0_disable_clock_gating()
502 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v2_0_disable_clock_gating()
504 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_GATE);  in vcn_v2_0_disable_clock_gating()
525 	WREG32_SOC15(VCN, 0, mmUVD_CGC_GATE, data);  in vcn_v2_0_disable_clock_gating()
527 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v2_0_disable_clock_gating()
548 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v2_0_disable_clock_gating()
551 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE);  in vcn_v2_0_disable_clock_gating()
576 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE, data);  in vcn_v2_0_disable_clock_gating()
578 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL);  in vcn_v2_0_disable_clock_gating()
589 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);  in vcn_v2_0_disable_clock_gating()
655 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v2_0_enable_clock_gating()
662 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v2_0_enable_clock_gating()
664 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v2_0_enable_clock_gating()
685 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v2_0_enable_clock_gating()
687 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL);  in vcn_v2_0_enable_clock_gating()
698 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);  in vcn_v2_0_enable_clock_gating()
720 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_v2_0_disable_static_power_gating()
721 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS,  in vcn_v2_0_disable_static_power_gating()
734 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_v2_0_disable_static_power_gating()
735 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, 0,  0xFFFFF);  in vcn_v2_0_disable_static_power_gating()
741 	data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);  in vcn_v2_0_disable_static_power_gating()
747 	WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);  in vcn_v2_0_disable_static_power_gating()
759 		data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);  in vcn_v2_0_enable_static_power_gating()
762 		WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);  in vcn_v2_0_enable_static_power_gating()
776 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_v2_0_enable_static_power_gating()
788 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, data, 0xFFFFF);  in vcn_v2_0_enable_static_power_gating()
972 	WREG32_SOC15(VCN, 0, mmUVD_MPC_CNTL, tmp);  in vcn_v2_0_start()
1004 	tmp = RREG32_SOC15(VCN, 0, mmUVD_SOFT_RESET);  in vcn_v2_0_start()
1007 	WREG32_SOC15(VCN, 0, mmUVD_SOFT_RESET, tmp);  in vcn_v2_0_start()
1145 	r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_STATUS, UVD_STATUS__IDLE, 0x7);  in vcn_v2_0_stop()
1153 	r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_LMI_STATUS, tmp, tmp);  in vcn_v2_0_stop()
1158 	tmp = RREG32_SOC15(VCN, 0, mmUVD_LMI_CTRL2);  in vcn_v2_0_stop()
1160 	WREG32_SOC15(VCN, 0, mmUVD_LMI_CTRL2, tmp);  in vcn_v2_0_stop()
1164 	r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_LMI_STATUS, tmp, tmp);  in vcn_v2_0_stop()
1188 	WREG32_SOC15(VCN, 0, mmUVD_STATUS, 0);  in vcn_v2_0_stop()
1281 	return (RREG32_SOC15(VCN, 0, mmUVD_STATUS) == UVD_STATUS__IDLE);  in vcn_v2_0_is_idle()
1289 	ret = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_STATUS, UVD_STATUS__IDLE,  in vcn_v2_0_wait_for_idle()