1211 		adev->umc.ras = &umc_v6_1_ras;  in gmc_v9_0_set_umc_funcs()
1219 		adev->umc.ras = &umc_v6_1_ras;  in gmc_v9_0_set_umc_funcs()
1228 			adev->umc.ras = &umc_v6_7_ras;  in gmc_v9_0_set_umc_funcs()
1238 	if (adev->umc.ras) {  in gmc_v9_0_set_umc_funcs()
1239 		amdgpu_ras_register_ras_block(adev, &adev->umc.ras->ras_block);  in gmc_v9_0_set_umc_funcs()
1241 		strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc");  in gmc_v9_0_set_umc_funcs()
1242 		adev->umc.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__UMC;  in gmc_v9_0_set_umc_funcs()
1243 		adev->umc.ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;  in gmc_v9_0_set_umc_funcs()
1244 		adev->umc.ras_if = &adev->umc.ras->ras_block.ras_comm;  in gmc_v9_0_set_umc_funcs()
1247 		if (!adev->umc.ras->ras_block.ras_late_init)  in gmc_v9_0_set_umc_funcs()
1248 				adev->umc.ras->ras_block.ras_late_init = amdgpu_umc_ras_late_init;  in gmc_v9_0_set_umc_funcs()
1251 		if (!adev->umc.ras->ras_block.ras_cb)  in gmc_v9_0_set_umc_funcs()
1252 			adev->umc.ras->ras_block.ras_cb = amdgpu_umc_process_ras_data_cb;  in gmc_v9_0_set_umc_funcs()
1275 		adev->mmhub.ras = &mmhub_v1_0_ras;  in gmc_v9_0_set_mmhub_ras_funcs()
1278 		adev->mmhub.ras = &mmhub_v9_4_ras;  in gmc_v9_0_set_mmhub_ras_funcs()
1281 		adev->mmhub.ras = &mmhub_v1_7_ras;  in gmc_v9_0_set_mmhub_ras_funcs()
1288 	if (adev->mmhub.ras) {  in gmc_v9_0_set_mmhub_ras_funcs()
1289 		amdgpu_ras_register_ras_block(adev, &adev->mmhub.ras->ras_block);  in gmc_v9_0_set_mmhub_ras_funcs()
1291 		strcpy(adev->mmhub.ras->ras_block.ras_comm.name, "mmhub");  in gmc_v9_0_set_mmhub_ras_funcs()
1292 		adev->mmhub.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MMHUB;  in gmc_v9_0_set_mmhub_ras_funcs()
1293 		adev->mmhub.ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;  in gmc_v9_0_set_mmhub_ras_funcs()
1294 		adev->mmhub.ras_if = &adev->mmhub.ras->ras_block.ras_comm;  in gmc_v9_0_set_mmhub_ras_funcs()
1305 	adev->hdp.ras = &hdp_v4_0_ras;  in gmc_v9_0_set_hdp_ras_funcs()
1306 	amdgpu_ras_register_ras_block(adev, &adev->hdp.ras->ras_block);  in gmc_v9_0_set_hdp_ras_funcs()
1307 	adev->hdp.ras_if = &adev->hdp.ras->ras_block.ras_comm;  in gmc_v9_0_set_hdp_ras_funcs()
1385 		if (adev->mmhub.ras && adev->mmhub.ras->ras_block.hw_ops &&  in gmc_v9_0_late_init()
1386 		    adev->mmhub.ras->ras_block.hw_ops->reset_ras_error_count)  in gmc_v9_0_late_init()
1387 			adev->mmhub.ras->ras_block.hw_ops->reset_ras_error_count(adev);  in gmc_v9_0_late_init()
1389 		if (adev->hdp.ras && adev->hdp.ras->ras_block.hw_ops &&  in gmc_v9_0_late_init()
1390 		    adev->hdp.ras->ras_block.hw_ops->reset_ras_error_count)  in gmc_v9_0_late_init()
1391 			adev->hdp.ras->ras_block.hw_ops->reset_ras_error_count(adev);  in gmc_v9_0_late_init()