2959 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad…  in wave_read_ind()  argument
2963 		(simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |  in wave_read_ind()
2969 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd,  in wave_read_regs()  argument
2975 		(simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |  in wave_read_regs()
2984 static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3…  in gfx_v6_0_read_wave_data()  argument
2988 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);  in gfx_v6_0_read_wave_data()
2989 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);  in gfx_v6_0_read_wave_data()
2990 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);  in gfx_v6_0_read_wave_data()
2991 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);  in gfx_v6_0_read_wave_data()
2992 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI);  in gfx_v6_0_read_wave_data()
2993 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID);  in gfx_v6_0_read_wave_data()
2994 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0);  in gfx_v6_0_read_wave_data()
2995 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1);  in gfx_v6_0_read_wave_data()
2996 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC);  in gfx_v6_0_read_wave_data()
2997 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC);  in gfx_v6_0_read_wave_data()
2998 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS);  in gfx_v6_0_read_wave_data()
2999 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS);  in gfx_v6_0_read_wave_data()
3000 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO);  in gfx_v6_0_read_wave_data()
3001 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI);  in gfx_v6_0_read_wave_data()
3002 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO);  in gfx_v6_0_read_wave_data()
3003 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI);  in gfx_v6_0_read_wave_data()
3004 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);  in gfx_v6_0_read_wave_data()
3005 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);  in gfx_v6_0_read_wave_data()
3006 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE);  in gfx_v6_0_read_wave_data()
3009 static void gfx_v6_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,  in gfx_v6_0_read_wave_sgprs()  argument
3014 		adev, simd, wave, 0,  in gfx_v6_0_read_wave_sgprs()