27 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_get_direction()  local
29 	return r->direction & BIT(offset) ? GPIO_LINE_DIRECTION_IN :  in gpio_reg_get_direction()
36 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_direction_output()  local
38 	if (r->direction & BIT(offset))  in gpio_reg_direction_output()
47 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_direction_input()  local
49 	return r->direction & BIT(offset) ? 0 : -ENOTSUPP;  in gpio_reg_direction_input()
54 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_set()  local
58 	spin_lock_irqsave(&r->lock, flags);  in gpio_reg_set()
59 	val = r->out;  in gpio_reg_set()
64 	r->out = val;  in gpio_reg_set()
65 	writel_relaxed(val, r->reg);  in gpio_reg_set()
66 	spin_unlock_irqrestore(&r->lock, flags);  in gpio_reg_set()
71 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_get()  local
74 	if (r->direction & mask) {  in gpio_reg_get()
79 		readl_relaxed(r->reg);  in gpio_reg_get()
80 		val = readl_relaxed(r->reg);  in gpio_reg_get()
82 		val = r->out;  in gpio_reg_get()
90 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_set_multiple()  local
93 	spin_lock_irqsave(&r->lock, flags);  in gpio_reg_set_multiple()
94 	r->out = (r->out & ~*mask) | (*bits & *mask);  in gpio_reg_set_multiple()
95 	writel_relaxed(r->out, r->reg);  in gpio_reg_set_multiple()
96 	spin_unlock_irqrestore(&r->lock, flags);  in gpio_reg_set_multiple()
101 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_to_irq()  local
102 	int irq = r->irqs[offset];  in gpio_reg_to_irq()
104 	if (irq >= 0 && r->irqdomain)  in gpio_reg_to_irq()
105 		irq = irq_find_mapping(r->irqdomain, irq);  in gpio_reg_to_irq()
135 	struct gpio_reg *r;  in gpio_reg_init()  local
139 		r = devm_kzalloc(dev, sizeof(*r), GFP_KERNEL);  in gpio_reg_init()
141 		r = kzalloc(sizeof(*r), GFP_KERNEL);  in gpio_reg_init()
143 	if (!r)  in gpio_reg_init()
146 	spin_lock_init(&r->lock);  in gpio_reg_init()
148 	r->gc.label = label;  in gpio_reg_init()
149 	r->gc.get_direction = gpio_reg_get_direction;  in gpio_reg_init()
150 	r->gc.direction_input = gpio_reg_direction_input;  in gpio_reg_init()
151 	r->gc.direction_output = gpio_reg_direction_output;  in gpio_reg_init()
152 	r->gc.set = gpio_reg_set;  in gpio_reg_init()
153 	r->gc.get = gpio_reg_get;  in gpio_reg_init()
154 	r->gc.set_multiple = gpio_reg_set_multiple;  in gpio_reg_init()
156 		r->gc.to_irq = gpio_reg_to_irq;  in gpio_reg_init()
157 	r->gc.base = base;  in gpio_reg_init()
158 	r->gc.ngpio = num;  in gpio_reg_init()
159 	r->gc.names = names;  in gpio_reg_init()
160 	r->direction = direction;  in gpio_reg_init()
161 	r->out = def_out;  in gpio_reg_init()
162 	r->reg = reg;  in gpio_reg_init()
163 	r->irqs = irqs;  in gpio_reg_init()
166 		ret = devm_gpiochip_add_data(dev, &r->gc, r);  in gpio_reg_init()
168 		ret = gpiochip_add_data(&r->gc, r);  in gpio_reg_init()
170 	return ret ? ERR_PTR(ret) : &r->gc;  in gpio_reg_init()
175 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_resume()  local
178 	spin_lock_irqsave(&r->lock, flags);  in gpio_reg_resume()
179 	writel_relaxed(r->out, r->reg);  in gpio_reg_resume()
180 	spin_unlock_irqrestore(&r->lock, flags);  in gpio_reg_resume()