Lines Matching refs:ohci
44 #define ohci_info(ohci, f, args...) dev_info(ohci->card.device, f, ##args) argument
45 #define ohci_notice(ohci, f, args...) dev_notice(ohci->card.device, f, ##args) argument
46 #define ohci_err(ohci, f, args...) dev_err(ohci->card.device, f, ##args) argument
88 struct fw_ohci *ohci; member
118 struct fw_ohci *ohci; member
366 static void log_irqs(struct fw_ohci *ohci, u32 evt) in log_irqs() argument
376 ohci_notice(ohci, "IRQ %08x%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", evt, in log_irqs()
415 static void log_selfids(struct fw_ohci *ohci, int generation, int self_id_count) in log_selfids() argument
422 ohci_notice(ohci, "%d selfIDs, generation %d, local node ID %04x\n", in log_selfids()
423 self_id_count, generation, ohci->node_id); in log_selfids()
425 for (s = ohci->self_id_buffer; self_id_count--; ++s) in log_selfids()
427 ohci_notice(ohci, in log_selfids()
434 ohci_notice(ohci, in log_selfids()
471 static void log_ar_at_event(struct fw_ohci *ohci, in log_ar_at_event() argument
484 ohci_notice(ohci, "A%c evt_bus_reset, generation %d\n", in log_ar_at_event()
504 ohci_notice(ohci, "A%c %s, %s\n", in log_ar_at_event()
508 ohci_notice(ohci, "A%c %s, PHY %08x %08x\n", in log_ar_at_event()
512 ohci_notice(ohci, in log_ar_at_event()
519 ohci_notice(ohci, in log_ar_at_event()
527 static inline void reg_write(const struct fw_ohci *ohci, int offset, u32 data) in reg_write() argument
529 writel(data, ohci->registers + offset); in reg_write()
532 static inline u32 reg_read(const struct fw_ohci *ohci, int offset) in reg_read() argument
534 return readl(ohci->registers + offset); in reg_read()
537 static inline void flush_writes(const struct fw_ohci *ohci) in flush_writes() argument
540 reg_read(ohci, OHCI1394_Version); in flush_writes()
549 static int read_phy_reg(struct fw_ohci *ohci, int addr) in read_phy_reg() argument
554 reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr)); in read_phy_reg()
556 val = reg_read(ohci, OHCI1394_PhyControl); in read_phy_reg()
570 ohci_err(ohci, "failed to read phy reg %d\n", addr); in read_phy_reg()
576 static int write_phy_reg(const struct fw_ohci *ohci, int addr, u32 val) in write_phy_reg() argument
580 reg_write(ohci, OHCI1394_PhyControl, in write_phy_reg()
583 val = reg_read(ohci, OHCI1394_PhyControl); in write_phy_reg()
593 ohci_err(ohci, "failed to write phy reg %d, val %u\n", addr, val); in write_phy_reg()
599 static int update_phy_reg(struct fw_ohci *ohci, int addr, in update_phy_reg() argument
602 int ret = read_phy_reg(ohci, addr); in update_phy_reg()
613 return write_phy_reg(ohci, addr, (ret & ~clear_bits) | set_bits); in update_phy_reg()
616 static int read_paged_phy_reg(struct fw_ohci *ohci, int page, int addr) in read_paged_phy_reg() argument
620 ret = update_phy_reg(ohci, 7, PHY_PAGE_SELECT, page << 5); in read_paged_phy_reg()
624 return read_phy_reg(ohci, addr); in read_paged_phy_reg()
629 struct fw_ohci *ohci = fw_ohci(card); in ohci_read_phy_reg() local
632 mutex_lock(&ohci->phy_reg_mutex); in ohci_read_phy_reg()
633 ret = read_phy_reg(ohci, addr); in ohci_read_phy_reg()
634 mutex_unlock(&ohci->phy_reg_mutex); in ohci_read_phy_reg()
642 struct fw_ohci *ohci = fw_ohci(card); in ohci_update_phy_reg() local
645 mutex_lock(&ohci->phy_reg_mutex); in ohci_update_phy_reg()
646 ret = update_phy_reg(ohci, addr, clear_bits, set_bits); in ohci_update_phy_reg()
647 mutex_unlock(&ohci->phy_reg_mutex); in ohci_update_phy_reg()
672 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ar_context_link_page()
677 struct device *dev = ctx->ohci->card.device; in ar_context_release()
691 struct fw_ohci *ohci = ctx->ohci; in ar_context_abort() local
693 if (reg_read(ohci, CONTROL_CLEAR(ctx->regs)) & CONTEXT_RUN) { in ar_context_abort()
694 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in ar_context_abort()
695 flush_writes(ohci); in ar_context_abort()
697 ohci_err(ohci, "AR error: %s; DMA stopped\n", error_msg); in ar_context_abort()
779 dma_sync_single_for_cpu(ctx->ohci->card.device, in ar_sync_buffers_for_cpu()
785 dma_sync_single_for_cpu(ctx->ohci->card.device, in ar_sync_buffers_for_cpu()
792 (ohci->quirks & QUIRK_BE_HEADERS ? (__force __u32)(v) : le32_to_cpu(v))
799 struct fw_ohci *ohci = ctx->ohci; in handle_ar_packet() local
858 p.generation = ohci->request_generation; in handle_ar_packet()
860 log_ar_at_event(ohci, 'R', p.speed, p.header, evt); in handle_ar_packet()
884 if (!(ohci->quirks & QUIRK_RESET_PACKET)) in handle_ar_packet()
885 ohci->request_generation = (p.header[2] >> 16) & 0xff; in handle_ar_packet()
886 } else if (ctx == &ohci->ar_request_ctx) { in handle_ar_packet()
887 fw_core_handle_request(&ohci->card, &p); in handle_ar_packet()
889 fw_core_handle_response(&ohci->card, &p); in handle_ar_packet()
915 dma_sync_single_for_device(ctx->ohci->card.device, in ar_recycle_buffers()
969 static int ar_context_init(struct ar_context *ctx, struct fw_ohci *ohci, in ar_context_init() argument
972 struct device *dev = ohci->card.device; in ar_context_init()
979 ctx->ohci = ohci; in ar_context_init()
1000 ctx->descriptors = ohci->misc_buffer + descriptors_offset; in ar_context_init()
1001 ctx->descriptors_bus = ohci->misc_buffer_bus + descriptors_offset; in ar_context_init()
1031 reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ctx->descriptors_bus | 1); in ar_context_run()
1032 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN); in ar_context_run()
1083 spin_lock_irqsave(&ctx->ohci->lock, flags); in context_tasklet()
1085 spin_unlock_irqrestore(&ctx->ohci->lock, flags); in context_tasklet()
1108 desc = dma_alloc_coherent(ctx->ohci->card.device, PAGE_SIZE, in context_add_buffer()
1130 static int context_init(struct context *ctx, struct fw_ohci *ohci, in context_init() argument
1133 ctx->ohci = ohci; in context_init()
1165 struct fw_card *card = &ctx->ohci->card; in context_release()
1208 struct fw_ohci *ohci = ctx->ohci; in context_run() local
1210 reg_write(ohci, COMMAND_PTR(ctx->regs), in context_run()
1212 reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0); in context_run()
1213 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra); in context_run()
1215 flush_writes(ohci); in context_run()
1243 if (unlikely(ctx->ohci->quirks & QUIRK_IR_WAKE) && in context_append()
1256 struct fw_ohci *ohci = ctx->ohci; in context_stop() local
1260 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in context_stop()
1264 reg = reg_read(ohci, CONTROL_SET(ctx->regs)); in context_stop()
1271 ohci_err(ohci, "DMA context still active (0x%08x)\n", reg); in context_stop()
1287 struct fw_ohci *ohci = ctx->ohci; in at_context_queue_packet() local
1366 payload_bus = dma_map_single(ohci->card.device, in at_context_queue_packet()
1370 if (dma_mapping_error(ohci->card.device, payload_bus)) { in at_context_queue_packet()
1396 if (ohci->generation != packet->generation) { in at_context_queue_packet()
1398 dma_unmap_single(ohci->card.device, payload_bus, in at_context_queue_packet()
1407 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in at_context_queue_packet()
1431 struct fw_ohci *ohci = context->ohci; in handle_at_packet() local
1445 dma_unmap_single(ohci->card.device, packet->payload_bus, in handle_at_packet()
1451 log_ar_at_event(ohci, 'T', packet->speed, packet->header, evt); in handle_at_packet()
1501 packet->callback(packet, &ohci->card, packet->ack); in handle_at_packet()
1512 static void handle_local_rom(struct fw_ohci *ohci, in handle_local_rom() argument
1533 (void *) ohci->config_rom + i, length); in handle_local_rom()
1536 fw_core_handle_response(&ohci->card, &response); in handle_local_rom()
1539 static void handle_local_lock(struct fw_ohci *ohci, in handle_local_lock() argument
1566 reg_write(ohci, OHCI1394_CSRData, lock_data); in handle_local_lock()
1567 reg_write(ohci, OHCI1394_CSRCompareData, lock_arg); in handle_local_lock()
1568 reg_write(ohci, OHCI1394_CSRControl, sel); in handle_local_lock()
1571 if (reg_read(ohci, OHCI1394_CSRControl) & 0x80000000) { in handle_local_lock()
1572 lock_old = cpu_to_be32(reg_read(ohci, in handle_local_lock()
1580 ohci_err(ohci, "swap not done (CSR lock timeout)\n"); in handle_local_lock()
1584 fw_core_handle_response(&ohci->card, &response); in handle_local_lock()
1591 if (ctx == &ctx->ohci->at_request_ctx) { in handle_local_request()
1593 packet->callback(packet, &ctx->ohci->card, packet->ack); in handle_local_request()
1604 handle_local_rom(ctx->ohci, packet, csr); in handle_local_request()
1610 handle_local_lock(ctx->ohci, packet, csr); in handle_local_request()
1613 if (ctx == &ctx->ohci->at_request_ctx) in handle_local_request()
1614 fw_core_handle_request(&ctx->ohci->card, packet); in handle_local_request()
1616 fw_core_handle_response(&ctx->ohci->card, packet); in handle_local_request()
1620 if (ctx == &ctx->ohci->at_response_ctx) { in handle_local_request()
1622 packet->callback(packet, &ctx->ohci->card, packet->ack); in handle_local_request()
1631 spin_lock_irqsave(&ctx->ohci->lock, flags); in at_context_transmit()
1633 if (HEADER_GET_DESTINATION(packet->header[0]) == ctx->ohci->node_id && in at_context_transmit()
1634 ctx->ohci->generation == packet->generation) { in at_context_transmit()
1635 spin_unlock_irqrestore(&ctx->ohci->lock, flags); in at_context_transmit()
1641 spin_unlock_irqrestore(&ctx->ohci->lock, flags); in at_context_transmit()
1644 packet->callback(packet, &ctx->ohci->card, packet->ack); in at_context_transmit()
1648 static void detect_dead_context(struct fw_ohci *ohci, in detect_dead_context() argument
1653 ctl = reg_read(ohci, CONTROL_SET(regs)); in detect_dead_context()
1655 ohci_err(ohci, "DMA context %s has stopped, error code: %s\n", in detect_dead_context()
1659 static void handle_dead_contexts(struct fw_ohci *ohci) in handle_dead_contexts() argument
1664 detect_dead_context(ohci, "ATReq", OHCI1394_AsReqTrContextBase); in handle_dead_contexts()
1665 detect_dead_context(ohci, "ATRsp", OHCI1394_AsRspTrContextBase); in handle_dead_contexts()
1666 detect_dead_context(ohci, "ARReq", OHCI1394_AsReqRcvContextBase); in handle_dead_contexts()
1667 detect_dead_context(ohci, "ARRsp", OHCI1394_AsRspRcvContextBase); in handle_dead_contexts()
1669 if (!(ohci->it_context_support & (1 << i))) in handle_dead_contexts()
1672 detect_dead_context(ohci, name, OHCI1394_IsoXmitContextBase(i)); in handle_dead_contexts()
1675 if (!(ohci->ir_context_support & (1 << i))) in handle_dead_contexts()
1678 detect_dead_context(ohci, name, OHCI1394_IsoRcvContextBase(i)); in handle_dead_contexts()
1709 static u32 get_cycle_time(struct fw_ohci *ohci) in get_cycle_time() argument
1716 c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); in get_cycle_time()
1718 if (ohci->quirks & QUIRK_CYCLE_TIMER) { in get_cycle_time()
1721 c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); in get_cycle_time()
1725 c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); in get_cycle_time()
1745 static u32 update_bus_time(struct fw_ohci *ohci) in update_bus_time() argument
1747 u32 cycle_time_seconds = get_cycle_time(ohci) >> 25; in update_bus_time()
1749 if (unlikely(!ohci->bus_time_running)) { in update_bus_time()
1750 reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_cycle64Seconds); in update_bus_time()
1751 ohci->bus_time = (lower_32_bits(ktime_get_seconds()) & ~0x7f) | in update_bus_time()
1753 ohci->bus_time_running = true; in update_bus_time()
1756 if ((ohci->bus_time & 0x40) != (cycle_time_seconds & 0x40)) in update_bus_time()
1757 ohci->bus_time += 0x40; in update_bus_time()
1759 return ohci->bus_time | cycle_time_seconds; in update_bus_time()
1762 static int get_status_for_port(struct fw_ohci *ohci, int port_index) in get_status_for_port() argument
1766 mutex_lock(&ohci->phy_reg_mutex); in get_status_for_port()
1767 reg = write_phy_reg(ohci, 7, port_index); in get_status_for_port()
1769 reg = read_phy_reg(ohci, 8); in get_status_for_port()
1770 mutex_unlock(&ohci->phy_reg_mutex); in get_status_for_port()
1783 static int get_self_id_pos(struct fw_ohci *ohci, u32 self_id, in get_self_id_pos() argument
1790 entry = ohci->self_id_buffer[i]; in get_self_id_pos()
1799 static int initiated_reset(struct fw_ohci *ohci) in initiated_reset() argument
1804 mutex_lock(&ohci->phy_reg_mutex); in initiated_reset()
1805 reg = write_phy_reg(ohci, 7, 0xe0); /* Select page 7 */ in initiated_reset()
1807 reg = read_phy_reg(ohci, 8); in initiated_reset()
1809 reg = write_phy_reg(ohci, 8, reg); /* set PMODE bit */ in initiated_reset()
1811 reg = read_phy_reg(ohci, 12); /* read register 12 */ in initiated_reset()
1820 mutex_unlock(&ohci->phy_reg_mutex); in initiated_reset()
1829 static int find_and_insert_self_id(struct fw_ohci *ohci, int self_id_count) in find_and_insert_self_id() argument
1835 reg = reg_read(ohci, OHCI1394_NodeID); in find_and_insert_self_id()
1837 ohci_notice(ohci, in find_and_insert_self_id()
1843 reg = ohci_read_phy_reg(&ohci->card, 4); in find_and_insert_self_id()
1848 reg = ohci_read_phy_reg(&ohci->card, 1); in find_and_insert_self_id()
1854 status = get_status_for_port(ohci, i); in find_and_insert_self_id()
1860 self_id |= initiated_reset(ohci); in find_and_insert_self_id()
1862 pos = get_self_id_pos(ohci, self_id, self_id_count); in find_and_insert_self_id()
1864 memmove(&(ohci->self_id_buffer[pos+1]), in find_and_insert_self_id()
1865 &(ohci->self_id_buffer[pos]), in find_and_insert_self_id()
1866 (self_id_count - pos) * sizeof(*ohci->self_id_buffer)); in find_and_insert_self_id()
1867 ohci->self_id_buffer[pos] = self_id; in find_and_insert_self_id()
1875 struct fw_ohci *ohci = in bus_reset_work() local
1883 reg = reg_read(ohci, OHCI1394_NodeID); in bus_reset_work()
1885 ohci_notice(ohci, in bus_reset_work()
1890 ohci_notice(ohci, "malconfigured bus\n"); in bus_reset_work()
1893 ohci->node_id = reg & (OHCI1394_NodeID_busNumber | in bus_reset_work()
1897 if (!(ohci->is_root && is_new_root)) in bus_reset_work()
1898 reg_write(ohci, OHCI1394_LinkControlSet, in bus_reset_work()
1900 ohci->is_root = is_new_root; in bus_reset_work()
1902 reg = reg_read(ohci, OHCI1394_SelfIDCount); in bus_reset_work()
1904 ohci_notice(ohci, "self ID receive error\n"); in bus_reset_work()
1916 ohci_notice(ohci, "bad selfIDSize (%08x)\n", reg); in bus_reset_work()
1920 generation = (cond_le32_to_cpu(ohci->self_id[0]) >> 16) & 0xff; in bus_reset_work()
1924 u32 id = cond_le32_to_cpu(ohci->self_id[i]); in bus_reset_work()
1925 u32 id2 = cond_le32_to_cpu(ohci->self_id[i + 1]); in bus_reset_work()
1936 ohci_notice(ohci, "ignoring spurious self IDs\n"); in bus_reset_work()
1941 ohci_notice(ohci, "bad self ID %d/%d (%08x != ~%08x)\n", in bus_reset_work()
1945 ohci->self_id_buffer[j] = id; in bus_reset_work()
1948 if (ohci->quirks & QUIRK_TI_SLLZ059) { in bus_reset_work()
1949 self_id_count = find_and_insert_self_id(ohci, self_id_count); in bus_reset_work()
1951 ohci_notice(ohci, in bus_reset_work()
1958 ohci_notice(ohci, "no self IDs\n"); in bus_reset_work()
1977 new_generation = (reg_read(ohci, OHCI1394_SelfIDCount) >> 16) & 0xff; in bus_reset_work()
1979 ohci_notice(ohci, "new bus reset, discarding self ids\n"); in bus_reset_work()
1984 spin_lock_irq(&ohci->lock); in bus_reset_work()
1986 ohci->generation = -1; /* prevent AT packet queueing */ in bus_reset_work()
1987 context_stop(&ohci->at_request_ctx); in bus_reset_work()
1988 context_stop(&ohci->at_response_ctx); in bus_reset_work()
1990 spin_unlock_irq(&ohci->lock); in bus_reset_work()
1997 at_context_flush(&ohci->at_request_ctx); in bus_reset_work()
1998 at_context_flush(&ohci->at_response_ctx); in bus_reset_work()
2000 spin_lock_irq(&ohci->lock); in bus_reset_work()
2002 ohci->generation = generation; in bus_reset_work()
2003 reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset); in bus_reset_work()
2005 if (ohci->quirks & QUIRK_RESET_PACKET) in bus_reset_work()
2006 ohci->request_generation = generation; in bus_reset_work()
2017 if (ohci->next_config_rom != NULL) { in bus_reset_work()
2018 if (ohci->next_config_rom != ohci->config_rom) { in bus_reset_work()
2019 free_rom = ohci->config_rom; in bus_reset_work()
2020 free_rom_bus = ohci->config_rom_bus; in bus_reset_work()
2022 ohci->config_rom = ohci->next_config_rom; in bus_reset_work()
2023 ohci->config_rom_bus = ohci->next_config_rom_bus; in bus_reset_work()
2024 ohci->next_config_rom = NULL; in bus_reset_work()
2032 reg_write(ohci, OHCI1394_BusOptions, in bus_reset_work()
2033 be32_to_cpu(ohci->config_rom[2])); in bus_reset_work()
2034 ohci->config_rom[0] = ohci->next_header; in bus_reset_work()
2035 reg_write(ohci, OHCI1394_ConfigROMhdr, in bus_reset_work()
2036 be32_to_cpu(ohci->next_header)); in bus_reset_work()
2040 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0); in bus_reset_work()
2041 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0); in bus_reset_work()
2044 spin_unlock_irq(&ohci->lock); in bus_reset_work()
2047 dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, in bus_reset_work()
2050 log_selfids(ohci, generation, self_id_count); in bus_reset_work()
2052 fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation, in bus_reset_work()
2053 self_id_count, ohci->self_id_buffer, in bus_reset_work()
2054 ohci->csr_state_setclear_abdicate); in bus_reset_work()
2055 ohci->csr_state_setclear_abdicate = false; in bus_reset_work()
2060 struct fw_ohci *ohci = data; in irq_handler() local
2064 event = reg_read(ohci, OHCI1394_IntEventClear); in irq_handler()
2073 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2075 log_irqs(ohci, event); in irq_handler()
2078 queue_work(selfid_workqueue, &ohci->bus_reset_work); in irq_handler()
2081 tasklet_schedule(&ohci->ar_request_ctx.tasklet); in irq_handler()
2084 tasklet_schedule(&ohci->ar_response_ctx.tasklet); in irq_handler()
2087 tasklet_schedule(&ohci->at_request_ctx.tasklet); in irq_handler()
2090 tasklet_schedule(&ohci->at_response_ctx.tasklet); in irq_handler()
2093 iso_event = reg_read(ohci, OHCI1394_IsoRecvIntEventClear); in irq_handler()
2094 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event); in irq_handler()
2099 &ohci->ir_context_list[i].context.tasklet); in irq_handler()
2105 iso_event = reg_read(ohci, OHCI1394_IsoXmitIntEventClear); in irq_handler()
2106 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event); in irq_handler()
2111 &ohci->it_context_list[i].context.tasklet); in irq_handler()
2117 ohci_err(ohci, "register access failure\n"); in irq_handler()
2120 reg_read(ohci, OHCI1394_PostedWriteAddressHi); in irq_handler()
2121 reg_read(ohci, OHCI1394_PostedWriteAddressLo); in irq_handler()
2122 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2125 ohci_err(ohci, "PCI posted write error\n"); in irq_handler()
2130 ohci_notice(ohci, "isochronous cycle too long\n"); in irq_handler()
2131 reg_write(ohci, OHCI1394_LinkControlSet, in irq_handler()
2143 ohci_notice(ohci, "isochronous cycle inconsistent\n"); in irq_handler()
2147 handle_dead_contexts(ohci); in irq_handler()
2150 spin_lock(&ohci->lock); in irq_handler()
2151 update_bus_time(ohci); in irq_handler()
2152 spin_unlock(&ohci->lock); in irq_handler()
2154 flush_writes(ohci); in irq_handler()
2159 static int software_reset(struct fw_ohci *ohci) in software_reset() argument
2164 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); in software_reset()
2166 val = reg_read(ohci, OHCI1394_HCControlSet); in software_reset()
2188 static int configure_1394a_enhancements(struct fw_ohci *ohci) in configure_1394a_enhancements() argument
2194 if (!(reg_read(ohci, OHCI1394_HCControlSet) & in configure_1394a_enhancements()
2200 ret = read_phy_reg(ohci, 2); in configure_1394a_enhancements()
2204 ret = read_paged_phy_reg(ohci, 1, 8); in configure_1394a_enhancements()
2211 if (ohci->quirks & QUIRK_NO_1394A) in configure_1394a_enhancements()
2222 ret = update_phy_reg(ohci, 5, clear, set); in configure_1394a_enhancements()
2230 reg_write(ohci, offset, OHCI1394_HCControl_aPhyEnhanceEnable); in configure_1394a_enhancements()
2233 reg_write(ohci, OHCI1394_HCControlClear, in configure_1394a_enhancements()
2239 static int probe_tsb41ba3d(struct fw_ohci *ohci) in probe_tsb41ba3d() argument
2245 reg = read_phy_reg(ohci, 2); in probe_tsb41ba3d()
2252 reg = read_paged_phy_reg(ohci, 1, i + 10); in probe_tsb41ba3d()
2264 struct fw_ohci *ohci = fw_ohci(card); in ohci_enable() local
2268 ret = software_reset(ohci); in ohci_enable()
2270 ohci_err(ohci, "failed to reset ohci card\n"); in ohci_enable()
2287 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2290 flush_writes(ohci); in ohci_enable()
2294 lps = reg_read(ohci, OHCI1394_HCControlSet) & in ohci_enable()
2299 ohci_err(ohci, "failed to set Link Power Status\n"); in ohci_enable()
2303 if (ohci->quirks & QUIRK_TI_SLLZ059) { in ohci_enable()
2304 ret = probe_tsb41ba3d(ohci); in ohci_enable()
2308 ohci_notice(ohci, "local TSB41BA3D phy\n"); in ohci_enable()
2310 ohci->quirks &= ~QUIRK_TI_SLLZ059; in ohci_enable()
2313 reg_write(ohci, OHCI1394_HCControlClear, in ohci_enable()
2316 reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); in ohci_enable()
2317 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2321 reg_write(ohci, OHCI1394_ATRetries, in ohci_enable()
2327 ohci->bus_time_running = false; in ohci_enable()
2330 if (ohci->ir_context_support & (1 << i)) in ohci_enable()
2331 reg_write(ohci, OHCI1394_IsoRcvContextControlClear(i), in ohci_enable()
2334 version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; in ohci_enable()
2336 reg_write(ohci, OHCI1394_InitialChannelsAvailableHi, in ohci_enable()
2342 reg_write(ohci, OHCI1394_FairnessControl, 0x3f); in ohci_enable()
2343 ohci->pri_req_max = reg_read(ohci, OHCI1394_FairnessControl) & 0x3f; in ohci_enable()
2344 reg_write(ohci, OHCI1394_FairnessControl, 0); in ohci_enable()
2345 card->priority_budget_implemented = ohci->pri_req_max != 0; in ohci_enable()
2347 reg_write(ohci, OHCI1394_PhyUpperBound, FW_MAX_PHYSICAL_RANGE >> 16); in ohci_enable()
2348 reg_write(ohci, OHCI1394_IntEventClear, ~0); in ohci_enable()
2349 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in ohci_enable()
2351 ret = configure_1394a_enhancements(ohci); in ohci_enable()
2380 ohci->next_config_rom = in ohci_enable()
2381 dma_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, in ohci_enable()
2382 &ohci->next_config_rom_bus, in ohci_enable()
2384 if (ohci->next_config_rom == NULL) in ohci_enable()
2387 copy_config_rom(ohci->next_config_rom, config_rom, length); in ohci_enable()
2393 ohci->next_config_rom = ohci->config_rom; in ohci_enable()
2394 ohci->next_config_rom_bus = ohci->config_rom_bus; in ohci_enable()
2397 ohci->next_header = ohci->next_config_rom[0]; in ohci_enable()
2398 ohci->next_config_rom[0] = 0; in ohci_enable()
2399 reg_write(ohci, OHCI1394_ConfigROMhdr, 0); in ohci_enable()
2400 reg_write(ohci, OHCI1394_BusOptions, in ohci_enable()
2401 be32_to_cpu(ohci->next_config_rom[2])); in ohci_enable()
2402 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_enable()
2404 reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); in ohci_enable()
2418 reg_write(ohci, OHCI1394_IntMaskSet, irqs); in ohci_enable()
2420 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2424 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2428 ar_context_run(&ohci->ar_request_ctx); in ohci_enable()
2429 ar_context_run(&ohci->ar_response_ctx); in ohci_enable()
2431 flush_writes(ohci); in ohci_enable()
2434 fw_schedule_bus_reset(&ohci->card, false, true); in ohci_enable()
2442 struct fw_ohci *ohci; in ohci_set_config_rom() local
2446 ohci = fw_ohci(card); in ohci_set_config_rom()
2476 dma_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, in ohci_set_config_rom()
2481 spin_lock_irq(&ohci->lock); in ohci_set_config_rom()
2494 if (ohci->next_config_rom == NULL) { in ohci_set_config_rom()
2495 ohci->next_config_rom = next_config_rom; in ohci_set_config_rom()
2496 ohci->next_config_rom_bus = next_config_rom_bus; in ohci_set_config_rom()
2500 copy_config_rom(ohci->next_config_rom, config_rom, length); in ohci_set_config_rom()
2502 ohci->next_header = config_rom[0]; in ohci_set_config_rom()
2503 ohci->next_config_rom[0] = 0; in ohci_set_config_rom()
2505 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_set_config_rom()
2507 spin_unlock_irq(&ohci->lock); in ohci_set_config_rom()
2511 dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, in ohci_set_config_rom()
2522 fw_schedule_bus_reset(&ohci->card, true, true); in ohci_set_config_rom()
2529 struct fw_ohci *ohci = fw_ohci(card); in ohci_send_request() local
2531 at_context_transmit(&ohci->at_request_ctx, packet); in ohci_send_request()
2536 struct fw_ohci *ohci = fw_ohci(card); in ohci_send_response() local
2538 at_context_transmit(&ohci->at_response_ctx, packet); in ohci_send_response()
2543 struct fw_ohci *ohci = fw_ohci(card); in ohci_cancel_packet() local
2544 struct context *ctx = &ohci->at_request_ctx; in ohci_cancel_packet()
2554 dma_unmap_single(ohci->card.device, packet->payload_bus, in ohci_cancel_packet()
2557 log_ar_at_event(ohci, 'T', packet->speed, packet->header, 0x20); in ohci_cancel_packet()
2560 packet->callback(packet, &ohci->card, packet->ack); in ohci_cancel_packet()
2571 struct fw_ohci *ohci = fw_ohci(card); in ohci_enable_phys_dma() local
2583 spin_lock_irqsave(&ohci->lock, flags); in ohci_enable_phys_dma()
2585 if (ohci->generation != generation) { in ohci_enable_phys_dma()
2597 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n); in ohci_enable_phys_dma()
2599 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32)); in ohci_enable_phys_dma()
2601 flush_writes(ohci); in ohci_enable_phys_dma()
2603 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_enable_phys_dma()
2610 struct fw_ohci *ohci = fw_ohci(card); in ohci_read_csr() local
2617 if (ohci->is_root && in ohci_read_csr()
2618 (reg_read(ohci, OHCI1394_LinkControlSet) & in ohci_read_csr()
2623 if (ohci->csr_state_setclear_abdicate) in ohci_read_csr()
2629 return reg_read(ohci, OHCI1394_NodeID) << 16; in ohci_read_csr()
2632 return get_cycle_time(ohci); in ohci_read_csr()
2640 spin_lock_irqsave(&ohci->lock, flags); in ohci_read_csr()
2641 value = update_bus_time(ohci); in ohci_read_csr()
2642 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_read_csr()
2646 value = reg_read(ohci, OHCI1394_ATRetries); in ohci_read_csr()
2650 return (reg_read(ohci, OHCI1394_FairnessControl) & 0x3f) | in ohci_read_csr()
2651 (ohci->pri_req_max << 8); in ohci_read_csr()
2661 struct fw_ohci *ohci = fw_ohci(card); in ohci_write_csr() local
2666 if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { in ohci_write_csr()
2667 reg_write(ohci, OHCI1394_LinkControlClear, in ohci_write_csr()
2669 flush_writes(ohci); in ohci_write_csr()
2672 ohci->csr_state_setclear_abdicate = false; in ohci_write_csr()
2676 if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { in ohci_write_csr()
2677 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_write_csr()
2679 flush_writes(ohci); in ohci_write_csr()
2682 ohci->csr_state_setclear_abdicate = true; in ohci_write_csr()
2686 reg_write(ohci, OHCI1394_NodeID, value >> 16); in ohci_write_csr()
2687 flush_writes(ohci); in ohci_write_csr()
2691 reg_write(ohci, OHCI1394_IsochronousCycleTimer, value); in ohci_write_csr()
2692 reg_write(ohci, OHCI1394_IntEventSet, in ohci_write_csr()
2694 flush_writes(ohci); in ohci_write_csr()
2698 spin_lock_irqsave(&ohci->lock, flags); in ohci_write_csr()
2699 ohci->bus_time = (update_bus_time(ohci) & 0x40) | in ohci_write_csr()
2701 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_write_csr()
2707 reg_write(ohci, OHCI1394_ATRetries, value); in ohci_write_csr()
2708 flush_writes(ohci); in ohci_write_csr()
2712 reg_write(ohci, OHCI1394_FairnessControl, value & 0x3f); in ohci_write_csr()
2713 flush_writes(ohci); in ohci_write_csr()
2776 dma_sync_single_range_for_cpu(context->ohci->card.device, in handle_ir_packet_per_buffer()
2815 dma_sync_single_range_for_cpu(context->ohci->card.device, in handle_ir_buffer_fill()
2832 dma_sync_single_range_for_cpu(ctx->context.ohci->card.device, in flush_ir_buffer_fill()
2870 dma_sync_single_range_for_cpu(context->ohci->card.device, in sync_it_packet_for_cpu()
2917 static void set_multichannel_mask(struct fw_ohci *ohci, u64 channels) in set_multichannel_mask() argument
2921 reg_write(ohci, OHCI1394_IRMultiChanMaskHiClear, ~hi); in set_multichannel_mask()
2922 reg_write(ohci, OHCI1394_IRMultiChanMaskLoClear, ~lo); in set_multichannel_mask()
2923 reg_write(ohci, OHCI1394_IRMultiChanMaskHiSet, hi); in set_multichannel_mask()
2924 reg_write(ohci, OHCI1394_IRMultiChanMaskLoSet, lo); in set_multichannel_mask()
2925 ohci->mc_channels = channels; in set_multichannel_mask()
2931 struct fw_ohci *ohci = fw_ohci(card); in ohci_allocate_iso_context() local
2938 spin_lock_irq(&ohci->lock); in ohci_allocate_iso_context()
2942 mask = &ohci->it_context_mask; in ohci_allocate_iso_context()
2948 ctx = &ohci->it_context_list[index]; in ohci_allocate_iso_context()
2953 channels = &ohci->ir_context_channels; in ohci_allocate_iso_context()
2954 mask = &ohci->ir_context_mask; in ohci_allocate_iso_context()
2961 ctx = &ohci->ir_context_list[index]; in ohci_allocate_iso_context()
2966 mask = &ohci->ir_context_mask; in ohci_allocate_iso_context()
2968 index = !ohci->mc_allocated ? ffs(*mask) - 1 : -1; in ohci_allocate_iso_context()
2970 ohci->mc_allocated = true; in ohci_allocate_iso_context()
2973 ctx = &ohci->ir_context_list[index]; in ohci_allocate_iso_context()
2982 spin_unlock_irq(&ohci->lock); in ohci_allocate_iso_context()
2994 ret = context_init(&ctx->context, ohci, regs, callback); in ohci_allocate_iso_context()
2999 set_multichannel_mask(ohci, 0); in ohci_allocate_iso_context()
3008 spin_lock_irq(&ohci->lock); in ohci_allocate_iso_context()
3016 ohci->mc_allocated = false; in ohci_allocate_iso_context()
3021 spin_unlock_irq(&ohci->lock); in ohci_allocate_iso_context()
3030 struct fw_ohci *ohci = ctx->context.ohci; in ohci_start_iso() local
3040 index = ctx - ohci->it_context_list; in ohci_start_iso()
3046 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index); in ohci_start_iso()
3047 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index); in ohci_start_iso()
3055 index = ctx - ohci->ir_context_list; in ohci_start_iso()
3062 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index); in ohci_start_iso()
3063 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index); in ohci_start_iso()
3064 reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match); in ohci_start_iso()
3078 struct fw_ohci *ohci = fw_ohci(base->card); in ohci_stop_iso() local
3084 index = ctx - ohci->it_context_list; in ohci_stop_iso()
3085 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index); in ohci_stop_iso()
3090 index = ctx - ohci->ir_context_list; in ohci_stop_iso()
3091 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index); in ohci_stop_iso()
3094 flush_writes(ohci); in ohci_stop_iso()
3103 struct fw_ohci *ohci = fw_ohci(base->card); in ohci_free_iso_context() local
3112 spin_lock_irqsave(&ohci->lock, flags); in ohci_free_iso_context()
3116 index = ctx - ohci->it_context_list; in ohci_free_iso_context()
3117 ohci->it_context_mask |= 1 << index; in ohci_free_iso_context()
3121 index = ctx - ohci->ir_context_list; in ohci_free_iso_context()
3122 ohci->ir_context_mask |= 1 << index; in ohci_free_iso_context()
3123 ohci->ir_context_channels |= 1ULL << base->channel; in ohci_free_iso_context()
3127 index = ctx - ohci->ir_context_list; in ohci_free_iso_context()
3128 ohci->ir_context_mask |= 1 << index; in ohci_free_iso_context()
3129 ohci->ir_context_channels |= ohci->mc_channels; in ohci_free_iso_context()
3130 ohci->mc_channels = 0; in ohci_free_iso_context()
3131 ohci->mc_allocated = false; in ohci_free_iso_context()
3135 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_free_iso_context()
3140 struct fw_ohci *ohci = fw_ohci(base->card); in ohci_set_iso_channels() local
3147 spin_lock_irqsave(&ohci->lock, flags); in ohci_set_iso_channels()
3150 if (~ohci->ir_context_channels & ~ohci->mc_channels & *channels) { in ohci_set_iso_channels()
3151 *channels = ohci->ir_context_channels; in ohci_set_iso_channels()
3154 set_multichannel_mask(ohci, *channels); in ohci_set_iso_channels()
3158 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_set_iso_channels()
3169 static void ohci_resume_iso_dma(struct fw_ohci *ohci) in ohci_resume_iso_dma() argument
3174 for (i = 0 ; i < ohci->n_ir ; i++) { in ohci_resume_iso_dma()
3175 ctx = &ohci->ir_context_list[i]; in ohci_resume_iso_dma()
3180 for (i = 0 ; i < ohci->n_it ; i++) { in ohci_resume_iso_dma()
3181 ctx = &ohci->it_context_list[i]; in ohci_resume_iso_dma()
3269 dma_sync_single_range_for_device(ctx->context.ohci->card.device, in queue_iso_transmit()
3297 struct device *device = ctx->context.ohci->card.device; in queue_iso_packet_per_buffer()
3415 dma_sync_single_range_for_device(ctx->context.ohci->card.device, in queue_iso_buffer_fill()
3438 spin_lock_irqsave(&ctx->context.ohci->lock, flags); in ohci_queue_iso()
3450 spin_unlock_irqrestore(&ctx->context.ohci->lock, flags); in ohci_queue_iso()
3460 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ohci_flush_queue_iso()
3550 struct fw_ohci *ohci; in pci_probe() local
3561 ohci = kzalloc(sizeof(*ohci), GFP_KERNEL); in pci_probe()
3562 if (ohci == NULL) { in pci_probe()
3567 fw_card_initialize(&ohci->card, &ohci_driver, &dev->dev); in pci_probe()
3579 pci_set_drvdata(dev, ohci); in pci_probe()
3581 spin_lock_init(&ohci->lock); in pci_probe()
3582 mutex_init(&ohci->phy_reg_mutex); in pci_probe()
3584 INIT_WORK(&ohci->bus_reset_work, bus_reset_work); in pci_probe()
3588 ohci_err(ohci, "invalid MMIO resource\n"); in pci_probe()
3595 ohci_err(ohci, "MMIO resource unavailable\n"); in pci_probe()
3599 ohci->registers = pci_iomap(dev, 0, OHCI1394_REGISTER_SIZE); in pci_probe()
3600 if (ohci->registers == NULL) { in pci_probe()
3601 ohci_err(ohci, "failed to remap registers\n"); in pci_probe()
3612 ohci->quirks = ohci_quirks[i].flags; in pci_probe()
3616 ohci->quirks = param_quirks; in pci_probe()
3625 ohci->misc_buffer = dma_alloc_coherent(ohci->card.device, in pci_probe()
3627 &ohci->misc_buffer_bus, in pci_probe()
3629 if (!ohci->misc_buffer) { in pci_probe()
3634 err = ar_context_init(&ohci->ar_request_ctx, ohci, 0, in pci_probe()
3639 err = ar_context_init(&ohci->ar_response_ctx, ohci, PAGE_SIZE/4, in pci_probe()
3644 err = context_init(&ohci->at_request_ctx, ohci, in pci_probe()
3649 err = context_init(&ohci->at_response_ctx, ohci, in pci_probe()
3654 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); in pci_probe()
3655 ohci->ir_context_channels = ~0ULL; in pci_probe()
3656 ohci->ir_context_support = reg_read(ohci, OHCI1394_IsoRecvIntMaskSet); in pci_probe()
3657 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); in pci_probe()
3658 ohci->ir_context_mask = ohci->ir_context_support; in pci_probe()
3659 ohci->n_ir = hweight32(ohci->ir_context_mask); in pci_probe()
3660 size = sizeof(struct iso_context) * ohci->n_ir; in pci_probe()
3661 ohci->ir_context_list = kzalloc(size, GFP_KERNEL); in pci_probe()
3663 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); in pci_probe()
3664 ohci->it_context_support = reg_read(ohci, OHCI1394_IsoXmitIntMaskSet); in pci_probe()
3666 if (!ohci->it_context_support) { in pci_probe()
3667 ohci_notice(ohci, "overriding IsoXmitIntMask\n"); in pci_probe()
3668 ohci->it_context_support = 0xf; in pci_probe()
3670 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); in pci_probe()
3671 ohci->it_context_mask = ohci->it_context_support; in pci_probe()
3672 ohci->n_it = hweight32(ohci->it_context_mask); in pci_probe()
3673 size = sizeof(struct iso_context) * ohci->n_it; in pci_probe()
3674 ohci->it_context_list = kzalloc(size, GFP_KERNEL); in pci_probe()
3676 if (ohci->it_context_list == NULL || ohci->ir_context_list == NULL) { in pci_probe()
3681 ohci->self_id = ohci->misc_buffer + PAGE_SIZE/2; in pci_probe()
3682 ohci->self_id_bus = ohci->misc_buffer_bus + PAGE_SIZE/2; in pci_probe()
3684 bus_options = reg_read(ohci, OHCI1394_BusOptions); in pci_probe()
3687 guid = ((u64) reg_read(ohci, OHCI1394_GUIDHi) << 32) | in pci_probe()
3688 reg_read(ohci, OHCI1394_GUIDLo); in pci_probe()
3690 if (!(ohci->quirks & QUIRK_NO_MSI)) in pci_probe()
3694 ohci_driver_name, ohci)) { in pci_probe()
3695 ohci_err(ohci, "failed to allocate interrupt %d\n", dev->irq); in pci_probe()
3700 err = fw_card_add(&ohci->card, max_receive, link_speed, guid); in pci_probe()
3704 version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; in pci_probe()
3705 ohci_notice(ohci, in pci_probe()
3708 version >> 16, version & 0xff, ohci->card.index, in pci_probe()
3709 ohci->n_ir, ohci->n_it, ohci->quirks, in pci_probe()
3710 reg_read(ohci, OHCI1394_PhyUpperBound) ? in pci_probe()
3716 free_irq(dev->irq, ohci); in pci_probe()
3720 kfree(ohci->ir_context_list); in pci_probe()
3721 kfree(ohci->it_context_list); in pci_probe()
3722 context_release(&ohci->at_response_ctx); in pci_probe()
3724 context_release(&ohci->at_request_ctx); in pci_probe()
3726 ar_context_release(&ohci->ar_response_ctx); in pci_probe()
3728 ar_context_release(&ohci->ar_request_ctx); in pci_probe()
3730 dma_free_coherent(ohci->card.device, PAGE_SIZE, in pci_probe()
3731 ohci->misc_buffer, ohci->misc_buffer_bus); in pci_probe()
3733 pci_iounmap(dev, ohci->registers); in pci_probe()
3739 kfree(ohci); in pci_probe()
3747 struct fw_ohci *ohci = pci_get_drvdata(dev); in pci_remove() local
3753 if (reg_read(ohci, OHCI1394_HCControlSet) & OHCI1394_HCControl_LPS) { in pci_remove()
3754 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in pci_remove()
3755 flush_writes(ohci); in pci_remove()
3757 cancel_work_sync(&ohci->bus_reset_work); in pci_remove()
3758 fw_core_remove_card(&ohci->card); in pci_remove()
3765 software_reset(ohci); in pci_remove()
3766 free_irq(dev->irq, ohci); in pci_remove()
3768 if (ohci->next_config_rom && ohci->next_config_rom != ohci->config_rom) in pci_remove()
3769 dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, in pci_remove()
3770 ohci->next_config_rom, ohci->next_config_rom_bus); in pci_remove()
3771 if (ohci->config_rom) in pci_remove()
3772 dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, in pci_remove()
3773 ohci->config_rom, ohci->config_rom_bus); in pci_remove()
3774 ar_context_release(&ohci->ar_request_ctx); in pci_remove()
3775 ar_context_release(&ohci->ar_response_ctx); in pci_remove()
3776 dma_free_coherent(ohci->card.device, PAGE_SIZE, in pci_remove()
3777 ohci->misc_buffer, ohci->misc_buffer_bus); in pci_remove()
3778 context_release(&ohci->at_request_ctx); in pci_remove()
3779 context_release(&ohci->at_response_ctx); in pci_remove()
3780 kfree(ohci->it_context_list); in pci_remove()
3781 kfree(ohci->ir_context_list); in pci_remove()
3783 pci_iounmap(dev, ohci->registers); in pci_remove()
3786 kfree(ohci); in pci_remove()
3795 struct fw_ohci *ohci = pci_get_drvdata(dev); in pci_suspend() local
3798 software_reset(ohci); in pci_suspend()
3801 ohci_err(ohci, "pci_save_state failed\n"); in pci_suspend()
3806 ohci_err(ohci, "pci_set_power_state failed with %d\n", err); in pci_suspend()
3814 struct fw_ohci *ohci = pci_get_drvdata(dev); in pci_resume() local
3822 ohci_err(ohci, "pci_enable_device failed\n"); in pci_resume()
3827 if (!reg_read(ohci, OHCI1394_GUIDLo) && in pci_resume()
3828 !reg_read(ohci, OHCI1394_GUIDHi)) { in pci_resume()
3829 reg_write(ohci, OHCI1394_GUIDLo, (u32)ohci->card.guid); in pci_resume()
3830 reg_write(ohci, OHCI1394_GUIDHi, (u32)(ohci->card.guid >> 32)); in pci_resume()
3833 err = ohci_enable(&ohci->card, NULL, 0); in pci_resume()
3837 ohci_resume_iso_dma(ohci); in pci_resume()