Lines Matching refs:edac_dbg
551 …edac_dbg(0, "\t\t%s DIMM= %d Channels= %d,%d (Branch= %d DRAM Bank= %d Buffer ID = %d rdwr= %s r… in i5400_proccess_non_recoverable_info()
603 edac_dbg(0, "\tCorrected bits= 0x%lx\n", allErrors); in i5400_process_nonfatal_error_info()
624 edac_dbg(0, "\t\tDIMM= %d Channel= %d (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5400_process_nonfatal_error_info()
775 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
778 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
782 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
872 edac_dbg(0, "ERROR: trying to access an invalid dimm: %d\n", in determine_mtr()
893 edac_dbg(2, "\tMTR%d=0x%x: DIMMs are %sPresent\n", in decode_mtr()
898 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr()
900 edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n", in decode_mtr()
903 edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr)); in decode_mtr()
904 edac_dbg(2, "\t\tNUMRANK: %s\n", in decode_mtr()
906 edac_dbg(2, "\t\tNUMROW: %s\n", in decode_mtr()
911 edac_dbg(2, "\t\tNUMCOL: %s\n", in decode_mtr()
988 edac_dbg(2, "%s\n", mem_buffer); in calculate_dimm_size()
1003 edac_dbg(2, "%s\n", mem_buffer); in calculate_dimm_size()
1013 edac_dbg(2, "%s\n", mem_buffer); in calculate_dimm_size()
1028 edac_dbg(2, "%s\n", mem_buffer); in calculate_dimm_size()
1041 edac_dbg(2, "%s\n", mem_buffer); in calculate_dimm_size()
1066 edac_dbg(2, "AMBASE= 0x%lx MAXCH= %d MAX-DIMM-Per-CH= %d\n", in i5400_get_mc_regs()
1072 edac_dbg(2, "\nTOLM (number of 256M regions) =%u (0x%x)\n", in i5400_get_mc_regs()
1076 edac_dbg(2, "Actual TOLM byte addr=%u.%03u GB (0x%x)\n", in i5400_get_mc_regs()
1086 edac_dbg(2, "MIR0: limit= 0x%x WAY1= %u WAY0= %x\n", in i5400_get_mc_regs()
1091 edac_dbg(2, "MIR1: limit= 0x%x WAY1= %u WAY0= %x\n", in i5400_get_mc_regs()
1102 edac_dbg(2, "MTR%d where=0x%x B0 value=0x%x\n", in i5400_get_mc_regs()
1113 edac_dbg(2, "MTR%d where=0x%x B1 value=0x%x\n", in i5400_get_mc_regs()
1118 edac_dbg(2, "Memory Technology Registers:\n"); in i5400_get_mc_regs()
1119 edac_dbg(2, " Branch 0:\n"); in i5400_get_mc_regs()
1125 edac_dbg(2, "\t\tAMB-Branch 0-present0 0x%x:\n", pvt->b0_ambpresent0); in i5400_get_mc_regs()
1128 edac_dbg(2, "\t\tAMB-Branch 0-present1 0x%x:\n", pvt->b0_ambpresent1); in i5400_get_mc_regs()
1136 edac_dbg(2, " Branch 1:\n"); in i5400_get_mc_regs()
1142 edac_dbg(2, "\t\tAMB-Branch 1-present0 0x%x:\n", in i5400_get_mc_regs()
1146 edac_dbg(2, "\t\tAMB-Branch 1-present1 0x%x:\n", in i5400_get_mc_regs()
1194 edac_dbg(2, "dimm (branch %d channel %d slot %d): %d.%03d GB\n", in i5400_init_dimms()
1261 edac_dbg(0, "MC: pdev bus %u dev=0x%x fn=0x%x\n", in i5400_probe1()
1287 edac_dbg(0, "MC: mci = %p\n", mci); in i5400_probe1()
1318 …edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i5400_init_dimms() returned nonze… in i5400_probe1()
1321 edac_dbg(1, "MC: Enable error reporting now\n"); in i5400_probe1()
1327 edac_dbg(0, "MC: failed edac_mc_add_mc()\n"); in i5400_probe1()
1370 edac_dbg(0, "MC:\n"); in i5400_init_one()
1389 edac_dbg(0, "\n"); in i5400_remove_one()
1437 edac_dbg(2, "MC:\n"); in i5400_init()
1453 edac_dbg(2, "MC:\n"); in i5400_exit()