2752 					    size_t tr_size, int tr_count,  in udma_alloc_tr_desc()  argument
2761 	switch (tr_size) {  in udma_alloc_tr_desc()
2768 		dev_err(uc->ud->dev, "Unsupported TR size of %zu\n", tr_size);  in udma_alloc_tr_desc()
2789 		hwdesc->cppi5_desc_size = cppi5_trdesc_calc_size(tr_size,  in udma_alloc_tr_desc()
2805 	hwdesc->tr_req_base = hwdesc->cppi5_desc_vaddr + tr_size;  in udma_alloc_tr_desc()
2807 	hwdesc->tr_resp_base = hwdesc->tr_req_base + tr_size * tr_count;  in udma_alloc_tr_desc()
2819 	cppi5_trdesc_init(tr_desc, tr_count, tr_size, 0, reload_count);  in udma_alloc_tr_desc()
2882 	size_t tr_size;  in udma_prep_slave_sg_tr()  local
2896 	tr_size = sizeof(struct cppi5_tr_type1_t);  in udma_prep_slave_sg_tr()
2897 	d = udma_alloc_tr_desc(uc, tr_size, num_tr, dir);  in udma_prep_slave_sg_tr()
2969 	size_t tr_size, sg_len;  in udma_prep_slave_sg_triggered_tr()  local
3026 	tr_size = sizeof(struct cppi5_tr_type15_t);  in udma_prep_slave_sg_triggered_tr()
3027 	d = udma_alloc_tr_desc(uc, tr_size, num_tr, dir);  in udma_prep_slave_sg_triggered_tr()
3470 	size_t tr_size, period_addr;  in udma_prep_dma_cyclic_tr()  local
3486 	tr_size = sizeof(struct cppi5_tr_type1_t);  in udma_prep_dma_cyclic_tr()
3487 	d = udma_alloc_tr_desc(uc, tr_size, periods * num_tr, dir);  in udma_prep_dma_cyclic_tr()
3677 	size_t tr_size = sizeof(struct cppi5_tr_type15_t);  in udma_prep_dma_memcpy()  local
3697 	d = udma_alloc_tr_desc(uc, tr_size, num_tr, DMA_MEM_TO_MEM);  in udma_prep_dma_memcpy()
5062 	size_t tr_size;  in udma_setup_rx_flush()  local
5079 	tr_size = sizeof(struct cppi5_tr_type1_t);  in udma_setup_rx_flush()
5080 	hwdesc->cppi5_desc_size = cppi5_trdesc_calc_size(tr_size, 1);  in udma_setup_rx_flush()
5096 	hwdesc->tr_req_base = hwdesc->cppi5_desc_vaddr + tr_size;  in udma_setup_rx_flush()
5098 	hwdesc->tr_resp_base = hwdesc->tr_req_base + tr_size;  in udma_setup_rx_flush()
5101 	cppi5_trdesc_init(tr_desc, 1, tr_size, 0, 0);  in udma_setup_rx_flush()