118 	struct tegra_adma_chan_regs	ch_regs;  member
139 	struct tegra_adma_chan_regs	ch_regs;  member
351 	struct tegra_adma_chan_regs *ch_regs;  in tegra_adma_start()  local
366 	ch_regs = &desc->ch_regs;  in tegra_adma_start()
370 	tdma_ch_write(tdc, ADMA_CH_TC, ch_regs->tc);  in tegra_adma_start()
371 	tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);  in tegra_adma_start()
372 	tdma_ch_write(tdc, ADMA_CH_LOWER_SRC_ADDR, ch_regs->src_addr);  in tegra_adma_start()
373 	tdma_ch_write(tdc, ADMA_CH_LOWER_TRG_ADDR, ch_regs->trg_addr);  in tegra_adma_start()
374 	tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_regs->fifo_ctrl);  in tegra_adma_start()
375 	tdma_ch_write(tdc, ADMA_CH_CONFIG, ch_regs->config);  in tegra_adma_start()
453 	struct tegra_adma_chan_regs *ch_regs = &desc->ch_regs;  in tegra_adma_pause()  local
456 	ch_regs->ctrl = tdma_ch_read(tdc, ADMA_CH_CTRL);  in tegra_adma_pause()
457 	ch_regs->ctrl |= (1 << ADMA_CH_CTRL_XFER_PAUSE_SHIFT);  in tegra_adma_pause()
458 	tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);  in tegra_adma_pause()
475 	struct tegra_adma_chan_regs *ch_regs = &desc->ch_regs;  in tegra_adma_resume()  local
477 	ch_regs->ctrl = tdma_ch_read(tdc, ADMA_CH_CTRL);  in tegra_adma_resume()
478 	ch_regs->ctrl &= ~(1 << ADMA_CH_CTRL_XFER_PAUSE_SHIFT);  in tegra_adma_resume()
479 	tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);  in tegra_adma_resume()
523 		residual = desc->ch_regs.tc;  in tegra_adma_tx_status()
558 	struct tegra_adma_chan_regs *ch_regs = &desc->ch_regs;  in tegra_adma_set_xfer_params()  local
570 		ch_regs->config = ADMA_CH_CONFIG_SRC_BUF(desc->num_periods - 1);  in tegra_adma_set_xfer_params()
571 		ch_regs->ctrl = ADMA_CH_REG_FIELD_VAL(tdc->sreq_index,  in tegra_adma_set_xfer_params()
574 		ch_regs->src_addr = buf_addr;  in tegra_adma_set_xfer_params()
581 		ch_regs->config = ADMA_CH_CONFIG_TRG_BUF(desc->num_periods - 1);  in tegra_adma_set_xfer_params()
582 		ch_regs->ctrl = ADMA_CH_REG_FIELD_VAL(tdc->sreq_index,  in tegra_adma_set_xfer_params()
585 		ch_regs->trg_addr = buf_addr;  in tegra_adma_set_xfer_params()
593 	ch_regs->ctrl |= ADMA_CH_CTRL_DIR(adma_dir) |  in tegra_adma_set_xfer_params()
596 	ch_regs->config |= cdata->adma_get_burst_config(burst_size);  in tegra_adma_set_xfer_params()
597 	ch_regs->config |= ADMA_CH_CONFIG_WEIGHT_FOR_WRR(1);  in tegra_adma_set_xfer_params()
599 		ch_regs->config |= TEGRA186_ADMA_CH_CONFIG_OUTSTANDING_REQS(8);  in tegra_adma_set_xfer_params()
613 		ch_regs->fifo_ctrl =  in tegra_adma_set_xfer_params()
617 		ch_regs->fifo_ctrl =  in tegra_adma_set_xfer_params()
621 	ch_regs->tc = desc->period_len & ADMA_CH_TC_COUNT_MASK;  in tegra_adma_set_xfer_params()
743 		ch_reg = &tdc->ch_regs;  in tegra_adma_runtime_suspend()
781 		ch_reg = &tdc->ch_regs;  in tegra_adma_runtime_resume()