Lines Matching refs:tdc
181 int (*terminate)(struct tegra_dma_channel *tdc);
220 struct tegra_dma_channel *tdc; member
256 static inline void tdc_write(struct tegra_dma_channel *tdc, in tdc_write() argument
259 writel_relaxed(val, tdc->tdma->base_addr + tdc->chan_base_offset + reg); in tdc_write()
262 static inline u32 tdc_read(struct tegra_dma_channel *tdc, u32 reg) in tdc_read() argument
264 return readl_relaxed(tdc->tdma->base_addr + tdc->chan_base_offset + reg); in tdc_read()
277 static inline struct device *tdc2dev(struct tegra_dma_channel *tdc) in tdc2dev() argument
279 return tdc->vc.chan.device->dev; in tdc2dev()
282 static void tegra_dma_dump_chan_regs(struct tegra_dma_channel *tdc) in tegra_dma_dump_chan_regs() argument
284 dev_dbg(tdc2dev(tdc), "DMA Channel %d name %s register dump:\n", in tegra_dma_dump_chan_regs()
285 tdc->id, tdc->name); in tegra_dma_dump_chan_regs()
286 dev_dbg(tdc2dev(tdc), "CSR %x STA %x CSRE %x SRC %x DST %x\n", in tegra_dma_dump_chan_regs()
287 tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSR), in tegra_dma_dump_chan_regs()
288 tdc_read(tdc, TEGRA_GPCDMA_CHAN_STATUS), in tegra_dma_dump_chan_regs()
289 tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSRE), in tegra_dma_dump_chan_regs()
290 tdc_read(tdc, TEGRA_GPCDMA_CHAN_SRC_PTR), in tegra_dma_dump_chan_regs()
291 tdc_read(tdc, TEGRA_GPCDMA_CHAN_DST_PTR) in tegra_dma_dump_chan_regs()
293 dev_dbg(tdc2dev(tdc), "MCSEQ %x IOSEQ %x WCNT %x XFER %x BSTA %x\n", in tegra_dma_dump_chan_regs()
294 tdc_read(tdc, TEGRA_GPCDMA_CHAN_MCSEQ), in tegra_dma_dump_chan_regs()
295 tdc_read(tdc, TEGRA_GPCDMA_CHAN_MMIOSEQ), in tegra_dma_dump_chan_regs()
296 tdc_read(tdc, TEGRA_GPCDMA_CHAN_WCOUNT), in tegra_dma_dump_chan_regs()
297 tdc_read(tdc, TEGRA_GPCDMA_CHAN_XFER_COUNT), in tegra_dma_dump_chan_regs()
298 tdc_read(tdc, TEGRA_GPCDMA_CHAN_DMA_BYTE_STATUS) in tegra_dma_dump_chan_regs()
300 dev_dbg(tdc2dev(tdc), "DMA ERR_STA %x\n", in tegra_dma_dump_chan_regs()
301 tdc_read(tdc, TEGRA_GPCDMA_CHAN_ERR_STATUS)); in tegra_dma_dump_chan_regs()
304 static int tegra_dma_sid_reserve(struct tegra_dma_channel *tdc, in tegra_dma_sid_reserve() argument
307 struct tegra_dma *tdma = tdc->tdma; in tegra_dma_sid_reserve()
308 int sid = tdc->slave_id; in tegra_dma_sid_reserve()
330 tdc->sid_dir = direction; in tegra_dma_sid_reserve()
335 static void tegra_dma_sid_free(struct tegra_dma_channel *tdc) in tegra_dma_sid_free() argument
337 struct tegra_dma *tdma = tdc->tdma; in tegra_dma_sid_free()
338 int sid = tdc->slave_id; in tegra_dma_sid_free()
340 switch (tdc->sid_dir) { in tegra_dma_sid_free()
351 tdc->sid_dir = DMA_TRANS_NONE; in tegra_dma_sid_free()
362 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); in tegra_dma_slave_config() local
364 memcpy(&tdc->dma_sconfig, sconfig, sizeof(*sconfig)); in tegra_dma_slave_config()
365 tdc->config_init = true; in tegra_dma_slave_config()
370 static int tegra_dma_pause(struct tegra_dma_channel *tdc) in tegra_dma_pause() argument
375 val = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSRE); in tegra_dma_pause()
377 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSRE, val); in tegra_dma_pause()
380 ret = readl_relaxed_poll_timeout_atomic(tdc->tdma->base_addr + in tegra_dma_pause()
381 tdc->chan_base_offset + TEGRA_GPCDMA_CHAN_STATUS, in tegra_dma_pause()
388 dev_err(tdc2dev(tdc), "DMA pause timed out\n"); in tegra_dma_pause()
389 tegra_dma_dump_chan_regs(tdc); in tegra_dma_pause()
397 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); in tegra_dma_device_pause() local
401 if (!tdc->tdma->chip_data->hw_support_pause) in tegra_dma_device_pause()
404 spin_lock_irqsave(&tdc->vc.lock, flags); in tegra_dma_device_pause()
405 ret = tegra_dma_pause(tdc); in tegra_dma_device_pause()
406 spin_unlock_irqrestore(&tdc->vc.lock, flags); in tegra_dma_device_pause()
411 static void tegra_dma_resume(struct tegra_dma_channel *tdc) in tegra_dma_resume() argument
415 val = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSRE); in tegra_dma_resume()
417 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSRE, val); in tegra_dma_resume()
422 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); in tegra_dma_device_resume() local
425 if (!tdc->tdma->chip_data->hw_support_pause) in tegra_dma_device_resume()
428 spin_lock_irqsave(&tdc->vc.lock, flags); in tegra_dma_device_resume()
429 tegra_dma_resume(tdc); in tegra_dma_device_resume()
430 spin_unlock_irqrestore(&tdc->vc.lock, flags); in tegra_dma_device_resume()
435 static inline int tegra_dma_pause_noerr(struct tegra_dma_channel *tdc) in tegra_dma_pause_noerr() argument
442 tegra_dma_pause(tdc); in tegra_dma_pause_noerr()
446 static void tegra_dma_disable(struct tegra_dma_channel *tdc) in tegra_dma_disable() argument
450 csr = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSR); in tegra_dma_disable()
457 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, csr); in tegra_dma_disable()
460 status = tdc_read(tdc, TEGRA_GPCDMA_CHAN_STATUS); in tegra_dma_disable()
462 dev_dbg(tdc2dev(tdc), "%s():clearing interrupt\n", __func__); in tegra_dma_disable()
463 tdc_write(tdc, TEGRA_GPCDMA_CHAN_STATUS, status); in tegra_dma_disable()
467 static void tegra_dma_configure_next_sg(struct tegra_dma_channel *tdc) in tegra_dma_configure_next_sg() argument
469 struct tegra_dma_desc *dma_desc = tdc->dma_desc; in tegra_dma_configure_next_sg()
481 ret = readl_relaxed_poll_timeout_atomic(tdc->tdma->base_addr + in tegra_dma_configure_next_sg()
482 tdc->chan_base_offset + TEGRA_GPCDMA_CHAN_STATUS, in tegra_dma_configure_next_sg()
491 tdc_write(tdc, TEGRA_GPCDMA_CHAN_WCOUNT, ch_regs->wcount); in tegra_dma_configure_next_sg()
492 tdc_write(tdc, TEGRA_GPCDMA_CHAN_SRC_PTR, ch_regs->src_ptr); in tegra_dma_configure_next_sg()
493 tdc_write(tdc, TEGRA_GPCDMA_CHAN_DST_PTR, ch_regs->dst_ptr); in tegra_dma_configure_next_sg()
494 tdc_write(tdc, TEGRA_GPCDMA_CHAN_HIGH_ADDR_PTR, ch_regs->high_addr_ptr); in tegra_dma_configure_next_sg()
497 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, in tegra_dma_configure_next_sg()
501 static void tegra_dma_start(struct tegra_dma_channel *tdc) in tegra_dma_start() argument
503 struct tegra_dma_desc *dma_desc = tdc->dma_desc; in tegra_dma_start()
508 vdesc = vchan_next_desc(&tdc->vc); in tegra_dma_start()
514 dma_desc->tdc = tdc; in tegra_dma_start()
515 tdc->dma_desc = dma_desc; in tegra_dma_start()
517 tegra_dma_resume(tdc); in tegra_dma_start()
522 tdc_write(tdc, TEGRA_GPCDMA_CHAN_WCOUNT, ch_regs->wcount); in tegra_dma_start()
523 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, 0); in tegra_dma_start()
524 tdc_write(tdc, TEGRA_GPCDMA_CHAN_SRC_PTR, ch_regs->src_ptr); in tegra_dma_start()
525 tdc_write(tdc, TEGRA_GPCDMA_CHAN_DST_PTR, ch_regs->dst_ptr); in tegra_dma_start()
526 tdc_write(tdc, TEGRA_GPCDMA_CHAN_HIGH_ADDR_PTR, ch_regs->high_addr_ptr); in tegra_dma_start()
527 tdc_write(tdc, TEGRA_GPCDMA_CHAN_FIXED_PATTERN, ch_regs->fixed_pattern); in tegra_dma_start()
528 tdc_write(tdc, TEGRA_GPCDMA_CHAN_MMIOSEQ, ch_regs->mmio_seq); in tegra_dma_start()
529 tdc_write(tdc, TEGRA_GPCDMA_CHAN_MCSEQ, ch_regs->mc_seq); in tegra_dma_start()
530 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, ch_regs->csr); in tegra_dma_start()
533 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, in tegra_dma_start()
537 static void tegra_dma_xfer_complete(struct tegra_dma_channel *tdc) in tegra_dma_xfer_complete() argument
539 vchan_cookie_complete(&tdc->dma_desc->vd); in tegra_dma_xfer_complete()
541 tegra_dma_sid_free(tdc); in tegra_dma_xfer_complete()
542 tdc->dma_desc = NULL; in tegra_dma_xfer_complete()
545 static void tegra_dma_chan_decode_error(struct tegra_dma_channel *tdc, in tegra_dma_chan_decode_error() argument
550 dev_err(tdc->tdma->dev, in tegra_dma_chan_decode_error()
551 "GPCDMA CH%d bm fifo full\n", tdc->id); in tegra_dma_chan_decode_error()
555 dev_err(tdc->tdma->dev, in tegra_dma_chan_decode_error()
556 "GPCDMA CH%d peripheral fifo full\n", tdc->id); in tegra_dma_chan_decode_error()
560 dev_err(tdc->tdma->dev, in tegra_dma_chan_decode_error()
561 "GPCDMA CH%d illegal peripheral id\n", tdc->id); in tegra_dma_chan_decode_error()
565 dev_err(tdc->tdma->dev, in tegra_dma_chan_decode_error()
566 "GPCDMA CH%d illegal stream id\n", tdc->id); in tegra_dma_chan_decode_error()
570 dev_err(tdc->tdma->dev, in tegra_dma_chan_decode_error()
571 "GPCDMA CH%d mc slave error\n", tdc->id); in tegra_dma_chan_decode_error()
575 dev_err(tdc->tdma->dev, in tegra_dma_chan_decode_error()
576 "GPCDMA CH%d mmio slave error\n", tdc->id); in tegra_dma_chan_decode_error()
580 dev_err(tdc->tdma->dev, in tegra_dma_chan_decode_error()
581 "GPCDMA CH%d security violation %x\n", tdc->id, in tegra_dma_chan_decode_error()
588 struct tegra_dma_channel *tdc = dev_id; in tegra_dma_isr() local
589 struct tegra_dma_desc *dma_desc = tdc->dma_desc; in tegra_dma_isr()
594 status = tdc_read(tdc, TEGRA_GPCDMA_CHAN_ERR_STATUS); in tegra_dma_isr()
596 tegra_dma_chan_decode_error(tdc, status); in tegra_dma_isr()
597 tegra_dma_dump_chan_regs(tdc); in tegra_dma_isr()
598 tdc_write(tdc, TEGRA_GPCDMA_CHAN_ERR_STATUS, 0xFFFFFFFF); in tegra_dma_isr()
601 spin_lock(&tdc->vc.lock); in tegra_dma_isr()
602 status = tdc_read(tdc, TEGRA_GPCDMA_CHAN_STATUS); in tegra_dma_isr()
606 tdc_write(tdc, TEGRA_GPCDMA_CHAN_STATUS, in tegra_dma_isr()
617 tegra_dma_configure_next_sg(tdc); in tegra_dma_isr()
621 tegra_dma_xfer_complete(tdc); in tegra_dma_isr()
623 tegra_dma_start(tdc); in tegra_dma_isr()
627 spin_unlock(&tdc->vc.lock); in tegra_dma_isr()
633 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); in tegra_dma_issue_pending() local
636 if (tdc->dma_desc) in tegra_dma_issue_pending()
639 spin_lock_irqsave(&tdc->vc.lock, flags); in tegra_dma_issue_pending()
640 if (vchan_issue_pending(&tdc->vc)) in tegra_dma_issue_pending()
641 tegra_dma_start(tdc); in tegra_dma_issue_pending()
650 if (tdc->dma_desc && tdc->dma_desc->cyclic) in tegra_dma_issue_pending()
651 tegra_dma_configure_next_sg(tdc); in tegra_dma_issue_pending()
653 spin_unlock_irqrestore(&tdc->vc.lock, flags); in tegra_dma_issue_pending()
656 static int tegra_dma_stop_client(struct tegra_dma_channel *tdc) in tegra_dma_stop_client() argument
666 csr = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSR); in tegra_dma_stop_client()
669 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, csr); in tegra_dma_stop_client()
678 ret = readl_relaxed_poll_timeout_atomic(tdc->tdma->base_addr + in tegra_dma_stop_client()
679 tdc->chan_base_offset + in tegra_dma_stop_client()
687 dev_err(tdc2dev(tdc), "Timeout waiting for DMA burst completion!\n"); in tegra_dma_stop_client()
688 tegra_dma_dump_chan_regs(tdc); in tegra_dma_stop_client()
696 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); in tegra_dma_terminate_all() local
701 spin_lock_irqsave(&tdc->vc.lock, flags); in tegra_dma_terminate_all()
703 if (tdc->dma_desc) { in tegra_dma_terminate_all()
704 err = tdc->tdma->chip_data->terminate(tdc); in tegra_dma_terminate_all()
706 spin_unlock_irqrestore(&tdc->vc.lock, flags); in tegra_dma_terminate_all()
710 vchan_terminate_vdesc(&tdc->dma_desc->vd); in tegra_dma_terminate_all()
711 tegra_dma_disable(tdc); in tegra_dma_terminate_all()
712 tdc->dma_desc = NULL; in tegra_dma_terminate_all()
715 tegra_dma_sid_free(tdc); in tegra_dma_terminate_all()
716 vchan_get_all_descriptors(&tdc->vc, &head); in tegra_dma_terminate_all()
717 spin_unlock_irqrestore(&tdc->vc.lock, flags); in tegra_dma_terminate_all()
719 vchan_dma_desc_free_list(&tdc->vc, &head); in tegra_dma_terminate_all()
724 static int tegra_dma_get_residual(struct tegra_dma_channel *tdc) in tegra_dma_get_residual() argument
726 struct tegra_dma_desc *dma_desc = tdc->dma_desc; in tegra_dma_get_residual()
731 wcount = tdc_read(tdc, TEGRA_GPCDMA_CHAN_XFER_COUNT); in tegra_dma_get_residual()
738 status = tdc_read(tdc, TEGRA_GPCDMA_CHAN_STATUS); in tegra_dma_get_residual()
754 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); in tegra_dma_tx_status() local
765 spin_lock_irqsave(&tdc->vc.lock, flags); in tegra_dma_tx_status()
766 vd = vchan_find_desc(&tdc->vc, cookie); in tegra_dma_tx_status()
771 } else if (tdc->dma_desc && tdc->dma_desc->vd.tx.cookie == cookie) { in tegra_dma_tx_status()
772 residual = tegra_dma_get_residual(tdc); in tegra_dma_tx_status()
775 dev_err(tdc2dev(tdc), "cookie %d is not found\n", cookie); in tegra_dma_tx_status()
777 spin_unlock_irqrestore(&tdc->vc.lock, flags); in tegra_dma_tx_status()
782 static inline int get_bus_width(struct tegra_dma_channel *tdc, in get_bus_width() argument
793 dev_err(tdc2dev(tdc), "given slave bus width is not supported\n"); in get_bus_width()
798 static unsigned int get_burst_size(struct tegra_dma_channel *tdc, in get_burst_size() argument
821 static int get_transfer_param(struct tegra_dma_channel *tdc, in get_transfer_param() argument
831 *apb_addr = tdc->dma_sconfig.dst_addr; in get_transfer_param()
832 *mmio_seq = get_bus_width(tdc, tdc->dma_sconfig.dst_addr_width); in get_transfer_param()
833 *burst_size = tdc->dma_sconfig.dst_maxburst; in get_transfer_param()
834 *slave_bw = tdc->dma_sconfig.dst_addr_width; in get_transfer_param()
838 *apb_addr = tdc->dma_sconfig.src_addr; in get_transfer_param()
839 *mmio_seq = get_bus_width(tdc, tdc->dma_sconfig.src_addr_width); in get_transfer_param()
840 *burst_size = tdc->dma_sconfig.src_maxburst; in get_transfer_param()
841 *slave_bw = tdc->dma_sconfig.src_addr_width; in get_transfer_param()
845 dev_err(tdc2dev(tdc), "DMA direction is not supported\n"); in get_transfer_param()
855 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); in tegra_dma_prep_dma_memset() local
856 unsigned int max_dma_count = tdc->tdma->chip_data->max_dma_count; in tegra_dma_prep_dma_memset()
862 dev_err(tdc2dev(tdc), in tegra_dma_prep_dma_memset()
879 mc_seq = tdc_read(tdc, TEGRA_GPCDMA_CHAN_MCSEQ); in tegra_dma_prep_dma_memset()
915 return vchan_tx_prep(&tdc->vc, &dma_desc->vd, flags); in tegra_dma_prep_dma_memset()
922 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); in tegra_dma_prep_dma_memcpy() local
928 max_dma_count = tdc->tdma->chip_data->max_dma_count; in tegra_dma_prep_dma_memcpy()
930 dev_err(tdc2dev(tdc), in tegra_dma_prep_dma_memcpy()
947 mc_seq = tdc_read(tdc, TEGRA_GPCDMA_CHAN_MCSEQ); in tegra_dma_prep_dma_memcpy()
985 return vchan_tx_prep(&tdc->vc, &dma_desc->vd, flags); in tegra_dma_prep_dma_memcpy()
993 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); in tegra_dma_prep_slave_sg() local
994 unsigned int max_dma_count = tdc->tdma->chip_data->max_dma_count; in tegra_dma_prep_slave_sg()
1004 if (!tdc->config_init) { in tegra_dma_prep_slave_sg()
1005 dev_err(tdc2dev(tdc), "DMA channel is not configured\n"); in tegra_dma_prep_slave_sg()
1009 dev_err(tdc2dev(tdc), "Invalid segment length %d\n", sg_len); in tegra_dma_prep_slave_sg()
1013 ret = tegra_dma_sid_reserve(tdc, direction); in tegra_dma_prep_slave_sg()
1017 ret = get_transfer_param(tdc, direction, &apb_ptr, &mmio_seq, &csr, in tegra_dma_prep_slave_sg()
1025 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_REQ_SEL_MASK, tdc->slave_id); in tegra_dma_prep_slave_sg()
1035 mc_seq = tdc_read(tdc, TEGRA_GPCDMA_CHAN_MCSEQ); in tegra_dma_prep_slave_sg()
1072 dev_err(tdc2dev(tdc), in tegra_dma_prep_slave_sg()
1078 mmio_seq |= get_burst_size(tdc, burst_size, slave_bw, len); in tegra_dma_prep_slave_sg()
1105 return vchan_tx_prep(&tdc->vc, &dma_desc->vd, flags); in tegra_dma_prep_slave_sg()
1116 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); in tegra_dma_prep_dma_cyclic() local
1123 dev_err(tdc2dev(tdc), "Invalid buffer/period len\n"); in tegra_dma_prep_dma_cyclic()
1127 if (!tdc->config_init) { in tegra_dma_prep_dma_cyclic()
1128 dev_err(tdc2dev(tdc), "DMA slave is not configured\n"); in tegra_dma_prep_dma_cyclic()
1132 ret = tegra_dma_sid_reserve(tdc, direction); in tegra_dma_prep_dma_cyclic()
1141 dev_err(tdc2dev(tdc), "buf_len is not multiple of period_len\n"); in tegra_dma_prep_dma_cyclic()
1146 max_dma_count = tdc->tdma->chip_data->max_dma_count; in tegra_dma_prep_dma_cyclic()
1148 dev_err(tdc2dev(tdc), "Req len/mem address is not correct\n"); in tegra_dma_prep_dma_cyclic()
1152 ret = get_transfer_param(tdc, direction, &apb_ptr, &mmio_seq, &csr, in tegra_dma_prep_dma_cyclic()
1160 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_REQ_SEL_MASK, tdc->slave_id); in tegra_dma_prep_dma_cyclic()
1172 mc_seq = tdc_read(tdc, TEGRA_GPCDMA_CHAN_MCSEQ); in tegra_dma_prep_dma_cyclic()
1202 mmio_seq |= get_burst_size(tdc, burst_size, slave_bw, len); in tegra_dma_prep_dma_cyclic()
1229 return vchan_tx_prep(&tdc->vc, &dma_desc->vd, flags); in tegra_dma_prep_dma_cyclic()
1234 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); in tegra_dma_alloc_chan_resources() local
1237 ret = request_irq(tdc->irq, tegra_dma_isr, 0, tdc->name, tdc); in tegra_dma_alloc_chan_resources()
1239 dev_err(tdc2dev(tdc), "request_irq failed for %s\n", tdc->name); in tegra_dma_alloc_chan_resources()
1243 dma_cookie_init(&tdc->vc.chan); in tegra_dma_alloc_chan_resources()
1244 tdc->config_init = false; in tegra_dma_alloc_chan_resources()
1250 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); in tegra_dma_chan_synchronize() local
1252 synchronize_irq(tdc->irq); in tegra_dma_chan_synchronize()
1253 vchan_synchronize(&tdc->vc); in tegra_dma_chan_synchronize()
1258 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); in tegra_dma_free_chan_resources() local
1260 dev_dbg(tdc2dev(tdc), "Freeing channel %d\n", tdc->id); in tegra_dma_free_chan_resources()
1263 synchronize_irq(tdc->irq); in tegra_dma_free_chan_resources()
1265 tasklet_kill(&tdc->vc.task); in tegra_dma_free_chan_resources()
1266 tdc->config_init = false; in tegra_dma_free_chan_resources()
1267 tdc->slave_id = -1; in tegra_dma_free_chan_resources()
1268 tdc->sid_dir = DMA_TRANS_NONE; in tegra_dma_free_chan_resources()
1269 free_irq(tdc->irq, tdc); in tegra_dma_free_chan_resources()
1271 vchan_free_chan_resources(&tdc->vc); in tegra_dma_free_chan_resources()
1278 struct tegra_dma_channel *tdc; in tegra_dma_of_xlate() local
1285 tdc = to_tegra_dma_chan(chan); in tegra_dma_of_xlate()
1286 tdc->slave_id = dma_spec->args[0]; in tegra_dma_of_xlate()
1330 static int tegra_dma_program_sid(struct tegra_dma_channel *tdc, int stream_id) in tegra_dma_program_sid() argument
1332 unsigned int reg_val = tdc_read(tdc, TEGRA_GPCDMA_CHAN_MCSEQ); in tegra_dma_program_sid()
1340 tdc_write(tdc, TEGRA_GPCDMA_CHAN_MCSEQ, reg_val); in tegra_dma_program_sid()
1386 struct tegra_dma_channel *tdc = &tdma->channels[i]; in tegra_dma_probe() local
1388 tdc->irq = platform_get_irq(pdev, i); in tegra_dma_probe()
1389 if (tdc->irq < 0) in tegra_dma_probe()
1390 return tdc->irq; in tegra_dma_probe()
1392 tdc->chan_base_offset = TEGRA_GPCDMA_CHANNEL_BASE_ADD_OFFSET + in tegra_dma_probe()
1394 snprintf(tdc->name, sizeof(tdc->name), "gpcdma.%d", i); in tegra_dma_probe()
1395 tdc->tdma = tdma; in tegra_dma_probe()
1396 tdc->id = i; in tegra_dma_probe()
1397 tdc->slave_id = -1; in tegra_dma_probe()
1399 vchan_init(&tdc->vc, &tdma->dma_dev); in tegra_dma_probe()
1400 tdc->vc.desc_free = tegra_dma_desc_free; in tegra_dma_probe()
1403 tegra_dma_program_sid(tdc, stream_id); in tegra_dma_probe()
1404 tdc->stream_id = stream_id; in tegra_dma_probe()
1475 struct tegra_dma_channel *tdc = &tdma->channels[i]; in tegra_dma_pm_suspend() local
1477 if (tdc->dma_desc) { in tegra_dma_pm_suspend()
1494 struct tegra_dma_channel *tdc = &tdma->channels[i]; in tegra_dma_pm_resume() local
1496 tegra_dma_program_sid(tdc, tdc->stream_id); in tegra_dma_pm_resume()