Lines Matching refs:chan2dev

252 static struct device *chan2dev(struct stm32_dma_chan *chan)  in chan2dev()  function
278 dev_err(chan2dev(chan), "Dma bus width not supported\n"); in stm32_dma_get_width()
378 dev_err(chan2dev(chan), "Dma burst size not supported\n"); in stm32_dma_get_burst()
491 dev_dbg(chan2dev(chan), "%s(): clearing interrupt: 0x%08x\n", in stm32_dma_stop()
540 dev_dbg(chan2dev(chan), "SCR: 0x%08x\n", scr); in stm32_dma_dump_reg()
541 dev_dbg(chan2dev(chan), "NDTR: 0x%08x\n", ndtr); in stm32_dma_dump_reg()
542 dev_dbg(chan2dev(chan), "SPAR: 0x%08x\n", spar); in stm32_dma_dump_reg()
543 dev_dbg(chan2dev(chan), "SM0AR: 0x%08x\n", sm0ar); in stm32_dma_dump_reg()
544 dev_dbg(chan2dev(chan), "SM1AR: 0x%08x\n", sm1ar); in stm32_dma_dump_reg()
545 dev_dbg(chan2dev(chan), "SFCR: 0x%08x\n", sfcr); in stm32_dma_dump_reg()
617 dev_dbg(chan2dev(chan), "vchan %pK: started\n", &chan->vchan); in stm32_dma_start_transfer()
634 dev_dbg(chan2dev(chan), "CT=1 <=> SM0AR: 0x%08x\n", in stm32_dma_configure_next_sg()
639 dev_dbg(chan2dev(chan), "CT=0 <=> SM1AR: 0x%08x\n", in stm32_dma_configure_next_sg()
680 dev_dbg(chan2dev(chan), "vchan %pK: paused\n", &chan->vchan); in stm32_dma_handle_chan_paused()
732 dev_dbg(chan2dev(chan), "vchan %pK: reconfigured after pause/resume\n", &chan->vchan); in stm32_dma_post_resume_reconfigure()
779 dev_err(chan2dev(chan), "FIFO Error\n"); in stm32_dma_chan_irq()
781 dev_dbg(chan2dev(chan), "FIFO over/underrun\n"); in stm32_dma_chan_irq()
788 dev_dbg(chan2dev(chan), "Direct mode overrun\n"); in stm32_dma_chan_irq()
807 dev_err(chan2dev(chan), "DMA error: status=0x%08x\n", status); in stm32_dma_chan_irq()
809 dev_err(chan2dev(chan), "chan disabled by HW\n"); in stm32_dma_chan_irq()
824 dev_dbg(chan2dev(chan), "vchan %pK: issued\n", &chan->vchan); in stm32_dma_issue_pending()
926 dev_dbg(chan2dev(chan), "vchan %pK: resumed\n", &chan->vchan); in stm32_dma_resume()
1063 dev_err(chan2dev(chan), "Dma direction is not supported\n"); in stm32_dma_set_xfer_param()
1096 dev_err(chan2dev(chan), "dma channel is not configured\n"); in stm32_dma_prep_slave_sg()
1101 dev_err(chan2dev(chan), "Invalid segment length %d\n", sg_len); in stm32_dma_prep_slave_sg()
1130 dev_err(chan2dev(chan), "nb items not supported\n"); in stm32_dma_prep_slave_sg()
1167 dev_err(chan2dev(chan), "Invalid buffer/period len\n"); in stm32_dma_prep_dma_cyclic()
1172 dev_err(chan2dev(chan), "dma channel is not configured\n"); in stm32_dma_prep_dma_cyclic()
1177 dev_err(chan2dev(chan), "buf_len not multiple of period_len\n"); in stm32_dma_prep_dma_cyclic()
1188 dev_err(chan2dev(chan), "Request not allowed when dma busy\n"); in stm32_dma_prep_dma_cyclic()
1199 dev_err(chan2dev(chan), "number of items not supported\n"); in stm32_dma_prep_dma_cyclic()
1478 dev_dbg(chan2dev(chan), "Freeing channel %d\n", chan->id); in stm32_dma_free_chan_resources()
1676 dev_name(chan2dev(chan)), chan); in stm32_dma_probe()