472 	struct stedma40_chan_cfg	 dma_cfg;  member
858 			chan->dma_cfg.dir == DMA_DEV_TO_MEM))  in d40_log_lli_to_lcxa()
1241 	u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type);  in d40_config_set_event()
1244 	if ((d40c->dma_cfg.dir == DMA_DEV_TO_MEM) ||  in d40_config_set_event()
1245 	    (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))  in d40_config_set_event()
1249 	if (d40c->dma_cfg.dir !=  DMA_DEV_TO_MEM)  in d40_config_set_event()
1343 		return phy_map[d40c->dma_cfg.mode_opt];  in d40_get_prmo()
1345 		return log_map[d40c->dma_cfg.mode_opt];  in d40_get_prmo()
1397 	return num_elt * d40c->dma_cfg.dst_info.data_width;  in d40_residue()
1833 	int dev_type = d40c->dma_cfg.dev_type;  in d40_allocate_channel()
1842 	bool is_log = d40c->dma_cfg.mode == STEDMA40_MODE_LOGICAL;  in d40_allocate_channel()
1847 	if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM) {  in d40_allocate_channel()
1850 	} else if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||  in d40_allocate_channel()
1851 		   d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {  in d40_allocate_channel()
1862 		if (d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {  in d40_allocate_channel()
1864 			if (d40c->dma_cfg.use_fixed_channel) {  in d40_allocate_channel()
1865 				i = d40c->dma_cfg.phy_channel;  in d40_allocate_channel()
1903 		if (d40c->dma_cfg.use_fixed_channel) {  in d40_allocate_channel()
1904 			i = d40c->dma_cfg.phy_channel;  in d40_allocate_channel()
1963 		d40c->dma_cfg = dma40_memcpy_conf_log;  in d40_config_memcpy()
1964 		d40c->dma_cfg.dev_type = dma40_memcpy_channels[d40c->chan.chan_id];  in d40_config_memcpy()
1966 		d40_log_cfg(&d40c->dma_cfg,  in d40_config_memcpy()
1971 		d40c->dma_cfg = dma40_memcpy_conf_phy;  in d40_config_memcpy()
1992 	u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type);  in d40_free_dma()
2010 	if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||  in d40_free_dma()
2011 	    d40c->dma_cfg.dir == DMA_MEM_TO_MEM)  in d40_free_dma()
2013 	else if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM)  in d40_free_dma()
2055 	u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type);  in d40_is_paused()
2073 	if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||  in d40_is_paused()
2074 	    d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {  in d40_is_paused()
2076 	} else if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM) {  in d40_is_paused()
2114 	struct stedma40_chan_cfg *cfg = &chan->dma_cfg;  in d40_prep_sg_log()
2142 	struct stedma40_chan_cfg *cfg = &chan->dma_cfg;  in d40_prep_sg_phy()
2181 	cfg = &chan->dma_cfg;  in d40_prep_desc()
2281 			d40c->dma_cfg = *info;  in stedma40_filter()
2294 	bool realtime = d40c->dma_cfg.realtime;  in __d40_set_prio_rt()
2295 	bool highprio = d40c->dma_cfg.high_priority;  in __d40_set_prio_rt()
2330 	if ((d40c->dma_cfg.dir ==  DMA_DEV_TO_MEM) ||  in d40_set_prio_realtime()
2331 	    (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))  in d40_set_prio_realtime()
2332 		__d40_set_prio_rt(d40c, d40c->dma_cfg.dev_type, true);  in d40_set_prio_realtime()
2334 	if ((d40c->dma_cfg.dir ==  DMA_MEM_TO_DEV) ||  in d40_set_prio_realtime()
2335 	    (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))  in d40_set_prio_realtime()
2336 		__d40_set_prio_rt(d40c, d40c->dma_cfg.dev_type, false);  in d40_set_prio_realtime()
2420 		if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM)  in d40_alloc_chan_resources()
2422 				d40c->dma_cfg.dev_type * D40_LCPA_CHAN_SIZE;  in d40_alloc_chan_resources()
2425 				d40c->dma_cfg.dev_type *  in d40_alloc_chan_resources()
2436 		 d40c->dma_cfg.use_fixed_channel ? ", fixed" : "");  in d40_alloc_chan_resources()
2660 	struct stedma40_chan_cfg *cfg = &d40c->dma_cfg;  in d40_set_runtime_config_write()