928 				    DMA_CUED_XOR_BASE) {  in ppc440spe_adma_device_clear_eot_status()
1860 	xcb->ops[xor_arg_no].h |= DMA_CUED_XOR_BASE;  in ppc440spe_rxor_set_src()
2124 					     DMA_CUED_XOR_BASE, dst[0], 0);  in ppc440spe_dma01_prep_mult()
2150 					     DMA_CUED_XOR_BASE, dst[0], 0);  in ppc440spe_dma01_prep_mult()
2206 		ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,  in ppc440spe_dma01_prep_sum_product()
2234 		ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,  in ppc440spe_dma01_prep_sum_product()
2259 		ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,  in ppc440spe_dma01_prep_sum_product()
2816 	ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE, addr, 0);  in ppc440spe_adma_pq_zero_op()
2873 						DMA_CUED_XOR_BASE, addr, 0);  in ppc440spe_adma_pq_set_dest()
2879 						DMA_CUED_XOR_BASE, paddr, 0);  in ppc440spe_adma_pq_set_dest()
2881 						DMA_CUED_XOR_BASE, qaddr, 1);  in ppc440spe_adma_pq_set_dest()
2916 					DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
2920 					DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
2949 							DMA_CUED_XOR_BASE,  in ppc440spe_adma_pq_set_dest()
2959 							DMA_CUED_XOR_BASE,  in ppc440spe_adma_pq_set_dest()
2963 							DMA_CUED_XOR_BASE,  in ppc440spe_adma_pq_set_dest()
2980 				DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
2985 				DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
3051 						DMA_CUED_XOR_BASE, paddr, 0);  in ppc440spe_adma_pqzero_sum_set_dest()
3053 						DMA_CUED_XOR_BASE, qaddr, 1);  in ppc440spe_adma_pqzero_sum_set_dest()
3063 						DMA_CUED_XOR_BASE, addr, 0);  in ppc440spe_adma_pqzero_sum_set_dest()
3138 				haddr |= DMA_CUED_XOR_BASE;  in ppc440spe_adma_pq_set_src()