170 static void axi_dmac_write(struct axi_dmac *axi_dmac, unsigned int reg,  in axi_dmac_write()  function
252 		axi_dmac_write(dmac, AXI_DMAC_REG_DEST_ADDRESS, sg->dest_addr);  in axi_dmac_start_transfer()
253 		axi_dmac_write(dmac, AXI_DMAC_REG_DEST_STRIDE, sg->dest_stride);  in axi_dmac_start_transfer()
257 		axi_dmac_write(dmac, AXI_DMAC_REG_SRC_ADDRESS, sg->src_addr);  in axi_dmac_start_transfer()
258 		axi_dmac_write(dmac, AXI_DMAC_REG_SRC_STRIDE, sg->src_stride);  in axi_dmac_start_transfer()
273 	axi_dmac_write(dmac, AXI_DMAC_REG_X_LENGTH, sg->x_len - 1);  in axi_dmac_start_transfer()
274 	axi_dmac_write(dmac, AXI_DMAC_REG_Y_LENGTH, sg->y_len - 1);  in axi_dmac_start_transfer()
275 	axi_dmac_write(dmac, AXI_DMAC_REG_FLAGS, flags);  in axi_dmac_start_transfer()
276 	axi_dmac_write(dmac, AXI_DMAC_REG_START_TRANSFER, 1);  in axi_dmac_start_transfer()
421 	axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_PENDING, pending);  in axi_dmac_interrupt_handler()
447 	axi_dmac_write(dmac, AXI_DMAC_REG_CTRL, 0);  in axi_dmac_terminate_all()
471 	axi_dmac_write(dmac, AXI_DMAC_REG_CTRL, AXI_DMAC_CTRL_ENABLE);  in axi_dmac_issue_pending()
866 	axi_dmac_write(dmac, AXI_DMAC_REG_FLAGS, AXI_DMAC_FLAG_CYCLIC);  in axi_dmac_detect_caps()
870 	axi_dmac_write(dmac, AXI_DMAC_REG_Y_LENGTH, 1);  in axi_dmac_detect_caps()
874 	axi_dmac_write(dmac, AXI_DMAC_REG_X_LENGTH, 0xffffffff);  in axi_dmac_detect_caps()
879 	axi_dmac_write(dmac, AXI_DMAC_REG_DEST_ADDRESS, 0xffffffff);  in axi_dmac_detect_caps()
887 	axi_dmac_write(dmac, AXI_DMAC_REG_SRC_ADDRESS, 0xffffffff);  in axi_dmac_detect_caps()
899 		axi_dmac_write(dmac, AXI_DMAC_REG_X_LENGTH, 0x00);  in axi_dmac_detect_caps()
984 	axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_MASK, 0x00);  in axi_dmac_probe()