34 	unsigned long ndiv;  member
49 	struct clkgen_field ndiv;  member
110 	.ndiv	= CLKGEN_FIELD(0x2f4, 0x7, 16),
146 	.ndiv	= CLKGEN_FIELD(0x2a4, 0x7, 16),
247 	u32 ndiv;  member
273 	CLKGEN_WRITE(pll, ndiv, pll->ndiv);  in quadfs_pll_enable()
325 	unsigned long nd = fs->ndiv + 16; /* ndiv value */  in clk_fs660c32_vco_get_rate()
339 	params.ndiv = CLKGEN_READ(pll, ndiv);  in quadfs_pll_fs660c32_recalc_rate()
344 	pll->ndiv = params.ndiv;  in quadfs_pll_fs660c32_recalc_rate()
373 	fs->ndiv = n - 16; /* Converting formula value to reg value */  in clk_fs660c32_vco_get_params()
391 		 rate, (unsigned int)params.ndiv);  in quadfs_pll_fs660c32_round_rate()
416 		 hwrate, (unsigned int)params.ndiv);  in quadfs_pll_fs660c32_set_rate()
421 	pll->ndiv = params.ndiv;  in quadfs_pll_fs660c32_set_rate()
426 	CLKGEN_WRITE(pll, ndiv, pll->ndiv);  in quadfs_pll_fs660c32_set_rate()