Lines Matching refs:CLK_PLL1_DIV2
41 CLK_PLL1_DIV2, enumerator
69 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
70 DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
71 DEF_FIXED(".s0", CLK_S0, CLK_PLL1_DIV2, 2, 1),
72 DEF_FIXED(".s1", CLK_S1, CLK_PLL1_DIV2, 3, 1),
73 DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1),
74 DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1),
75 DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
84 DEF_FIXED("ztr", R8A7796_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
85 DEF_FIXED("ztrd2", R8A7796_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
86 DEF_FIXED("zt", R8A7796_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
87 DEF_FIXED("zx", R8A7796_CLK_ZX, CLK_PLL1_DIV2, 2, 1),
117 DEF_FIXED("cl", R8A7796_CLK_CL, CLK_PLL1_DIV2, 48, 1),