59 static int gdsc_check_status(struct gdsc *sc, enum gdsc_status status)  in gdsc_check_status()  argument
65 	if (sc->flags & POLL_CFG_GDSCR)  in gdsc_check_status()
66 		reg = sc->gdscr + CFG_GDSCR_OFFSET;  in gdsc_check_status()
67 	else if (sc->gds_hw_ctrl)  in gdsc_check_status()
68 		reg = sc->gds_hw_ctrl;  in gdsc_check_status()
70 		reg = sc->gdscr;  in gdsc_check_status()
72 	ret = regmap_read(sc->regmap, reg, &val);  in gdsc_check_status()
76 	if (sc->flags & POLL_CFG_GDSCR) {  in gdsc_check_status()
95 static int gdsc_hwctrl(struct gdsc *sc, bool en)  in gdsc_hwctrl()  argument
99 	return regmap_update_bits(sc->regmap, sc->gdscr, HW_CONTROL_MASK, val);  in gdsc_hwctrl()
102 static int gdsc_poll_status(struct gdsc *sc, enum gdsc_status status)  in gdsc_poll_status()  argument
108 		if (gdsc_check_status(sc, status))  in gdsc_poll_status()
112 	if (gdsc_check_status(sc, status))  in gdsc_poll_status()
118 static int gdsc_update_collapse_bit(struct gdsc *sc, bool val)  in gdsc_update_collapse_bit()  argument
123 	if (sc->collapse_mask) {  in gdsc_update_collapse_bit()
124 		reg = sc->collapse_ctrl;  in gdsc_update_collapse_bit()
125 		mask = sc->collapse_mask;  in gdsc_update_collapse_bit()
127 		reg = sc->gdscr;  in gdsc_update_collapse_bit()
131 	ret = regmap_update_bits(sc->regmap, reg, mask, val ? mask : 0);  in gdsc_update_collapse_bit()
138 static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status)  in gdsc_toggle_logic()  argument
142 	if (status == GDSC_ON && sc->rsupply) {  in gdsc_toggle_logic()
143 		ret = regulator_enable(sc->rsupply);  in gdsc_toggle_logic()
148 	ret = gdsc_update_collapse_bit(sc, status == GDSC_OFF);  in gdsc_toggle_logic()
151 	if ((sc->flags & VOTABLE) && status == GDSC_OFF) {  in gdsc_toggle_logic()
161 	if (sc->gds_hw_ctrl) {  in gdsc_toggle_logic()
175 	ret = gdsc_poll_status(sc, status);  in gdsc_toggle_logic()
176 	WARN(ret, "%s status stuck at 'o%s'", sc->pd.name, status ? "ff" : "n");  in gdsc_toggle_logic()
178 	if (!ret && status == GDSC_OFF && sc->rsupply) {  in gdsc_toggle_logic()
179 		ret = regulator_disable(sc->rsupply);  in gdsc_toggle_logic()
187 static inline int gdsc_deassert_reset(struct gdsc *sc)  in gdsc_deassert_reset()  argument
191 	for (i = 0; i < sc->reset_count; i++)  in gdsc_deassert_reset()
192 		sc->rcdev->ops->deassert(sc->rcdev, sc->resets[i]);  in gdsc_deassert_reset()
196 static inline int gdsc_assert_reset(struct gdsc *sc)  in gdsc_assert_reset()  argument
200 	for (i = 0; i < sc->reset_count; i++)  in gdsc_assert_reset()
201 		sc->rcdev->ops->assert(sc->rcdev, sc->resets[i]);  in gdsc_assert_reset()
205 static inline void gdsc_force_mem_on(struct gdsc *sc)  in gdsc_force_mem_on()  argument
210 	if (!(sc->flags & NO_RET_PERIPH))  in gdsc_force_mem_on()
213 	for (i = 0; i < sc->cxc_count; i++)  in gdsc_force_mem_on()
214 		regmap_update_bits(sc->regmap, sc->cxcs[i], mask, mask);  in gdsc_force_mem_on()
217 static inline void gdsc_clear_mem_on(struct gdsc *sc)  in gdsc_clear_mem_on()  argument
222 	if (!(sc->flags & NO_RET_PERIPH))  in gdsc_clear_mem_on()
225 	for (i = 0; i < sc->cxc_count; i++)  in gdsc_clear_mem_on()
226 		regmap_update_bits(sc->regmap, sc->cxcs[i], mask, 0);  in gdsc_clear_mem_on()
229 static inline void gdsc_deassert_clamp_io(struct gdsc *sc)  in gdsc_deassert_clamp_io()  argument
231 	regmap_update_bits(sc->regmap, sc->clamp_io_ctrl,  in gdsc_deassert_clamp_io()
235 static inline void gdsc_assert_clamp_io(struct gdsc *sc)  in gdsc_assert_clamp_io()  argument
237 	regmap_update_bits(sc->regmap, sc->clamp_io_ctrl,  in gdsc_assert_clamp_io()
241 static inline void gdsc_assert_reset_aon(struct gdsc *sc)  in gdsc_assert_reset_aon()  argument
243 	regmap_update_bits(sc->regmap, sc->clamp_io_ctrl,  in gdsc_assert_reset_aon()
246 	regmap_update_bits(sc->regmap, sc->clamp_io_ctrl,  in gdsc_assert_reset_aon()
250 static void gdsc_retain_ff_on(struct gdsc *sc)  in gdsc_retain_ff_on()  argument
254 	regmap_update_bits(sc->regmap, sc->gdscr, mask, mask);  in gdsc_retain_ff_on()
259 	struct gdsc *sc = domain_to_gdsc(domain);  in gdsc_enable()  local
262 	if (sc->pwrsts == PWRSTS_ON)  in gdsc_enable()
263 		return gdsc_deassert_reset(sc);  in gdsc_enable()
265 	if (sc->flags & SW_RESET) {  in gdsc_enable()
266 		gdsc_assert_reset(sc);  in gdsc_enable()
268 		gdsc_deassert_reset(sc);  in gdsc_enable()
271 	if (sc->flags & CLAMP_IO) {  in gdsc_enable()
272 		if (sc->flags & AON_RESET)  in gdsc_enable()
273 			gdsc_assert_reset_aon(sc);  in gdsc_enable()
274 		gdsc_deassert_clamp_io(sc);  in gdsc_enable()
277 	ret = gdsc_toggle_logic(sc, GDSC_ON);  in gdsc_enable()
281 	if (sc->pwrsts & PWRSTS_OFF)  in gdsc_enable()
282 		gdsc_force_mem_on(sc);  in gdsc_enable()
294 	if (sc->flags & HW_CTRL) {  in gdsc_enable()
295 		ret = gdsc_hwctrl(sc, true);  in gdsc_enable()
309 	if (sc->flags & RETAIN_FF_ENABLE)  in gdsc_enable()
310 		gdsc_retain_ff_on(sc);  in gdsc_enable()
317 	struct gdsc *sc = domain_to_gdsc(domain);  in gdsc_disable()  local
320 	if (sc->pwrsts == PWRSTS_ON)  in gdsc_disable()
321 		return gdsc_assert_reset(sc);  in gdsc_disable()
324 	if (sc->flags & HW_CTRL) {  in gdsc_disable()
325 		ret = gdsc_hwctrl(sc, false);  in gdsc_disable()
336 		ret = gdsc_poll_status(sc, GDSC_ON);  in gdsc_disable()
341 	if (sc->pwrsts & PWRSTS_OFF)  in gdsc_disable()
342 		gdsc_clear_mem_on(sc);  in gdsc_disable()
351 	if (sc->pwrsts == PWRSTS_RET_ON)  in gdsc_disable()
354 	ret = gdsc_toggle_logic(sc, GDSC_OFF);  in gdsc_disable()
358 	if (sc->flags & CLAMP_IO)  in gdsc_disable()
359 		gdsc_assert_clamp_io(sc);  in gdsc_disable()
364 static int gdsc_init(struct gdsc *sc)  in gdsc_init()  argument
377 	if (!sc->en_rest_wait_val)  in gdsc_init()
378 		sc->en_rest_wait_val = EN_REST_WAIT_VAL;  in gdsc_init()
379 	if (!sc->en_few_wait_val)  in gdsc_init()
380 		sc->en_few_wait_val = EN_FEW_WAIT_VAL;  in gdsc_init()
381 	if (!sc->clk_dis_wait_val)  in gdsc_init()
382 		sc->clk_dis_wait_val = CLK_DIS_WAIT_VAL;  in gdsc_init()
384 	val = sc->en_rest_wait_val << EN_REST_WAIT_SHIFT |  in gdsc_init()
385 		sc->en_few_wait_val << EN_FEW_WAIT_SHIFT |  in gdsc_init()
386 		sc->clk_dis_wait_val << CLK_DIS_WAIT_SHIFT;  in gdsc_init()
388 	ret = regmap_update_bits(sc->regmap, sc->gdscr, mask, val);  in gdsc_init()
393 	if (sc->pwrsts == PWRSTS_ON) {  in gdsc_init()
394 		ret = gdsc_toggle_logic(sc, GDSC_ON);  in gdsc_init()
399 	on = gdsc_check_status(sc, GDSC_ON);  in gdsc_init()
405 		if (sc->rsupply) {  in gdsc_init()
406 			ret = regulator_enable(sc->rsupply);  in gdsc_init()
415 		if (sc->flags & VOTABLE) {  in gdsc_init()
416 			ret = gdsc_update_collapse_bit(sc, false);  in gdsc_init()
422 		if (sc->flags & HW_CTRL) {  in gdsc_init()
423 			ret = gdsc_hwctrl(sc, true);  in gdsc_init()
433 		if (sc->flags & RETAIN_FF_ENABLE)  in gdsc_init()
434 			gdsc_retain_ff_on(sc);  in gdsc_init()
435 	} else if (sc->flags & ALWAYS_ON) {  in gdsc_init()
437 		gdsc_enable(&sc->pd);  in gdsc_init()
441 	if (on || (sc->pwrsts & PWRSTS_RET))  in gdsc_init()
442 		gdsc_force_mem_on(sc);  in gdsc_init()
444 		gdsc_clear_mem_on(sc);  in gdsc_init()
446 	if (sc->flags & ALWAYS_ON)  in gdsc_init()
447 		sc->pd.flags |= GENPD_FLAG_ALWAYS_ON;  in gdsc_init()
448 	if (!sc->pd.power_off)  in gdsc_init()
449 		sc->pd.power_off = gdsc_disable;  in gdsc_init()
450 	if (!sc->pd.power_on)  in gdsc_init()
451 		sc->pd.power_on = gdsc_enable;  in gdsc_init()
453 	ret = pm_genpd_init(&sc->pd, NULL, !on);  in gdsc_init()
460 	if (on && sc->rsupply)  in gdsc_init()
461 		regulator_disable(sc->rsupply);  in gdsc_init()