Lines Matching refs:clk_data

633 	struct clk_hw_onecell_data *clk_data;  in mtk_topckgen_init()  local
641 clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK); in mtk_topckgen_init()
644 clk_data); in mtk_topckgen_init()
647 clk_data); in mtk_topckgen_init()
650 base, &mt7622_clk_lock, clk_data); in mtk_topckgen_init()
653 base, &mt7622_clk_lock, clk_data); in mtk_topckgen_init()
656 clk_data); in mtk_topckgen_init()
658 clk_prepare_enable(clk_data->hws[CLK_TOP_AXI_SEL]->clk); in mtk_topckgen_init()
659 clk_prepare_enable(clk_data->hws[CLK_TOP_MEM_SEL]->clk); in mtk_topckgen_init()
660 clk_prepare_enable(clk_data->hws[CLK_TOP_DDRPHYCFG_SEL]->clk); in mtk_topckgen_init()
662 return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); in mtk_topckgen_init()
668 struct clk_hw_onecell_data *clk_data; in mtk_infrasys_init() local
671 clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); in mtk_infrasys_init()
674 clk_data); in mtk_infrasys_init()
677 clk_data); in mtk_infrasys_init()
680 clk_data); in mtk_infrasys_init()
691 struct clk_hw_onecell_data *clk_data; in mtk_apmixedsys_init() local
694 clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK); in mtk_apmixedsys_init()
695 if (!clk_data) in mtk_apmixedsys_init()
699 clk_data); in mtk_apmixedsys_init()
702 ARRAY_SIZE(apmixed_clks), clk_data); in mtk_apmixedsys_init()
704 clk_prepare_enable(clk_data->hws[CLK_APMIXED_ARMPLL]->clk); in mtk_apmixedsys_init()
705 clk_prepare_enable(clk_data->hws[CLK_APMIXED_MAIN_CORE_EN]->clk); in mtk_apmixedsys_init()
707 return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); in mtk_apmixedsys_init()
712 struct clk_hw_onecell_data *clk_data; in mtk_pericfg_init() local
721 clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK); in mtk_pericfg_init()
724 clk_data); in mtk_pericfg_init()
727 &mt7622_clk_lock, clk_data); in mtk_pericfg_init()
729 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); in mtk_pericfg_init()
733 clk_prepare_enable(clk_data->hws[CLK_PERI_UART0_PD]->clk); in mtk_pericfg_init()