Lines Matching refs:CGU_CLK_DIV
151 "cclk", CGU_CLK_DIV,
164 "h0clk", CGU_CLK_DIV,
172 "h1clk", CGU_CLK_DIV | CGU_CLK_GATE,
181 "h2clk", CGU_CLK_DIV,
189 "c1clk", CGU_CLK_DIV | CGU_CLK_GATE,
198 "pclk", CGU_CLK_DIV,
209 "mmc0_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
216 "mmc1_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
223 "mmc2_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
230 "cim", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
237 "uhc", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
244 "gpu", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
251 "bch", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
258 "lpclk", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
265 "gps", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
275 "ssi_mux", CGU_CLK_DIV | CGU_CLK_MUX,
282 "pcm_mux", CGU_CLK_DIV | CGU_CLK_MUX,
289 "i2s", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
297 "usb", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,