85 	const struct ingenic_cgu_pll_info *pll_info;  in ingenic_pll_recalc_rate()  local
91 	pll_info = &clk_info->pll;  in ingenic_pll_recalc_rate()
93 	ctl = readl(cgu->base + pll_info->reg);  in ingenic_pll_recalc_rate()
95 	m = (ctl >> pll_info->m_shift) & GENMASK(pll_info->m_bits - 1, 0);  in ingenic_pll_recalc_rate()
96 	m += pll_info->m_offset;  in ingenic_pll_recalc_rate()
97 	n = (ctl >> pll_info->n_shift) & GENMASK(pll_info->n_bits - 1, 0);  in ingenic_pll_recalc_rate()
98 	n += pll_info->n_offset;  in ingenic_pll_recalc_rate()
99 	od_enc = ctl >> pll_info->od_shift;  in ingenic_pll_recalc_rate()
100 	od_enc &= GENMASK(pll_info->od_bits - 1, 0);  in ingenic_pll_recalc_rate()
102 	if (pll_info->bypass_bit >= 0) {  in ingenic_pll_recalc_rate()
103 		ctl = readl(cgu->base + pll_info->bypass_reg);  in ingenic_pll_recalc_rate()
105 		bypass = !!(ctl & BIT(pll_info->bypass_bit));  in ingenic_pll_recalc_rate()
111 	for (od = 0; od < pll_info->od_max; od++) {  in ingenic_pll_recalc_rate()
112 		if (pll_info->od_encoding[od] == od_enc)  in ingenic_pll_recalc_rate()
115 	BUG_ON(od == pll_info->od_max);  in ingenic_pll_recalc_rate()
118 	return div_u64((u64)parent_rate * m * pll_info->rate_multiplier,  in ingenic_pll_recalc_rate()
123 ingenic_pll_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info,  in ingenic_pll_calc_m_n_od()  argument
134 	n = min_t(unsigned int, n, 1 << pll_info->n_bits);  in ingenic_pll_calc_m_n_od()
135 	n = max_t(unsigned int, n, pll_info->n_offset);  in ingenic_pll_calc_m_n_od()
138 	m = min_t(unsigned int, m, 1 << pll_info->m_bits);  in ingenic_pll_calc_m_n_od()
139 	m = max_t(unsigned int, m, pll_info->m_offset);  in ingenic_pll_calc_m_n_od()
151 	const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll;  in ingenic_pll_calc()  local
154 	if (pll_info->calc_m_n_od)  in ingenic_pll_calc()
155 		(*pll_info->calc_m_n_od)(pll_info, rate, parent_rate, &m, &n, &od);  in ingenic_pll_calc()
157 		ingenic_pll_calc_m_n_od(pll_info, rate, parent_rate, &m, &n, &od);  in ingenic_pll_calc()
166 	return div_u64((u64)parent_rate * m * pll_info->rate_multiplier,  in ingenic_pll_calc()
181 					   const struct ingenic_cgu_pll_info *pll_info)  in ingenic_pll_check_stable()  argument
185 	return readl_poll_timeout(cgu->base + pll_info->reg, ctl,  in ingenic_pll_check_stable()
186 				  ctl & BIT(pll_info->stable_bit),  in ingenic_pll_check_stable()
197 	const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll;  in ingenic_pll_set_rate()  local
210 	ctl = readl(cgu->base + pll_info->reg);  in ingenic_pll_set_rate()
212 	ctl &= ~(GENMASK(pll_info->m_bits - 1, 0) << pll_info->m_shift);  in ingenic_pll_set_rate()
213 	ctl |= (m - pll_info->m_offset) << pll_info->m_shift;  in ingenic_pll_set_rate()
215 	ctl &= ~(GENMASK(pll_info->n_bits - 1, 0) << pll_info->n_shift);  in ingenic_pll_set_rate()
216 	ctl |= (n - pll_info->n_offset) << pll_info->n_shift;  in ingenic_pll_set_rate()
218 	ctl &= ~(GENMASK(pll_info->od_bits - 1, 0) << pll_info->od_shift);  in ingenic_pll_set_rate()
219 	ctl |= pll_info->od_encoding[od - 1] << pll_info->od_shift;  in ingenic_pll_set_rate()
221 	writel(ctl, cgu->base + pll_info->reg);  in ingenic_pll_set_rate()
224 	if (ctl & BIT(pll_info->enable_bit))  in ingenic_pll_set_rate()
225 		ret = ingenic_pll_check_stable(cgu, pll_info);  in ingenic_pll_set_rate()
237 	const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll;  in ingenic_pll_enable()  local
243 	if (pll_info->bypass_bit >= 0) {  in ingenic_pll_enable()
244 		ctl = readl(cgu->base + pll_info->bypass_reg);  in ingenic_pll_enable()
246 		ctl &= ~BIT(pll_info->bypass_bit);  in ingenic_pll_enable()
248 		writel(ctl, cgu->base + pll_info->bypass_reg);  in ingenic_pll_enable()
251 	ctl = readl(cgu->base + pll_info->reg);  in ingenic_pll_enable()
253 	ctl |= BIT(pll_info->enable_bit);  in ingenic_pll_enable()
255 	writel(ctl, cgu->base + pll_info->reg);  in ingenic_pll_enable()
257 	ret = ingenic_pll_check_stable(cgu, pll_info);  in ingenic_pll_enable()
268 	const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll;  in ingenic_pll_disable()  local
273 	ctl = readl(cgu->base + pll_info->reg);  in ingenic_pll_disable()
275 	ctl &= ~BIT(pll_info->enable_bit);  in ingenic_pll_disable()
277 	writel(ctl, cgu->base + pll_info->reg);  in ingenic_pll_disable()
286 	const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll;  in ingenic_pll_is_enabled()  local
289 	ctl = readl(cgu->base + pll_info->reg);  in ingenic_pll_is_enabled()
291 	return !!(ctl & BIT(pll_info->enable_bit));  in ingenic_pll_is_enabled()