Lines Matching refs:hws
49 struct clk_hw **hws; in imx7ulp_clk_scg1_init() local
52 clk_data = kzalloc(struct_size(clk_data, hws, IMX7ULP_CLK_SCG1_END), in imx7ulp_clk_scg1_init()
58 hws = clk_data->hws; in imx7ulp_clk_scg1_init()
60 hws[IMX7ULP_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx7ulp_clk_scg1_init()
62 hws[IMX7ULP_CLK_ROSC] = imx_obtain_fixed_clk_hw(np, "rosc"); in imx7ulp_clk_scg1_init()
63 hws[IMX7ULP_CLK_SOSC] = imx_obtain_fixed_clk_hw(np, "sosc"); in imx7ulp_clk_scg1_init()
64 hws[IMX7ULP_CLK_SIRC] = imx_obtain_fixed_clk_hw(np, "sirc"); in imx7ulp_clk_scg1_init()
65 hws[IMX7ULP_CLK_FIRC] = imx_obtain_fixed_clk_hw(np, "firc"); in imx7ulp_clk_scg1_init()
66 hws[IMX7ULP_CLK_UPLL] = imx_obtain_fixed_clk_hw(np, "upll"); in imx7ulp_clk_scg1_init()
73 …hws[IMX7ULP_CLK_APLL_PRE_SEL] = imx_clk_hw_mux_flags("apll_pre_sel", base + 0x508, 0, 1, pll_pre_s… in imx7ulp_clk_scg1_init()
74 …hws[IMX7ULP_CLK_SPLL_PRE_SEL] = imx_clk_hw_mux_flags("spll_pre_sel", base + 0x608, 0, 1, pll_pre_s… in imx7ulp_clk_scg1_init()
77 …hws[IMX7ULP_CLK_APLL_PRE_DIV] = imx_clk_hw_divider_flags("apll_pre_div", "apll_pre_sel", base + 0x… in imx7ulp_clk_scg1_init()
78 …hws[IMX7ULP_CLK_SPLL_PRE_DIV] = imx_clk_hw_divider_flags("spll_pre_div", "spll_pre_sel", base + 0x… in imx7ulp_clk_scg1_init()
81 …hws[IMX7ULP_CLK_APLL] = imx_clk_hw_pllv4(IMX_PLLV4_IMX7ULP, "apll", "apll_pre_div", base + 0x500… in imx7ulp_clk_scg1_init()
82 …hws[IMX7ULP_CLK_SPLL] = imx_clk_hw_pllv4(IMX_PLLV4_IMX7ULP, "spll", "spll_pre_div", base + 0x600… in imx7ulp_clk_scg1_init()
85 …hws[IMX7ULP_CLK_APLL_PFD0] = imx_clk_hw_pfdv2(IMX_PFDV2_IMX7ULP, "apll_pfd0", "apll", base + 0x50c… in imx7ulp_clk_scg1_init()
86 …hws[IMX7ULP_CLK_APLL_PFD1] = imx_clk_hw_pfdv2(IMX_PFDV2_IMX7ULP, "apll_pfd1", "apll", base + 0x50c… in imx7ulp_clk_scg1_init()
87 …hws[IMX7ULP_CLK_APLL_PFD2] = imx_clk_hw_pfdv2(IMX_PFDV2_IMX7ULP, "apll_pfd2", "apll", base + 0x50c… in imx7ulp_clk_scg1_init()
88 …hws[IMX7ULP_CLK_APLL_PFD3] = imx_clk_hw_pfdv2(IMX_PFDV2_IMX7ULP, "apll_pfd3", "apll", base + 0x50c… in imx7ulp_clk_scg1_init()
91 …hws[IMX7ULP_CLK_SPLL_PFD0] = imx_clk_hw_pfdv2(IMX_PFDV2_IMX7ULP, "spll_pfd0", "spll", base + 0x60C… in imx7ulp_clk_scg1_init()
92 …hws[IMX7ULP_CLK_SPLL_PFD1] = imx_clk_hw_pfdv2(IMX_PFDV2_IMX7ULP, "spll_pfd1", "spll", base + 0x60C… in imx7ulp_clk_scg1_init()
93 …hws[IMX7ULP_CLK_SPLL_PFD2] = imx_clk_hw_pfdv2(IMX_PFDV2_IMX7ULP, "spll_pfd2", "spll", base + 0x60C… in imx7ulp_clk_scg1_init()
94 …hws[IMX7ULP_CLK_SPLL_PFD3] = imx_clk_hw_pfdv2(IMX_PFDV2_IMX7ULP, "spll_pfd3", "spll", base + 0x60C… in imx7ulp_clk_scg1_init()
97 …hws[IMX7ULP_CLK_APLL_PFD_SEL] = imx_clk_hw_mux_flags("apll_pfd_sel", base + 0x508, 14, 2, apll_pfd… in imx7ulp_clk_scg1_init()
98 …hws[IMX7ULP_CLK_SPLL_PFD_SEL] = imx_clk_hw_mux_flags("spll_pfd_sel", base + 0x608, 14, 2, spll_pfd… in imx7ulp_clk_scg1_init()
99 …hws[IMX7ULP_CLK_APLL_SEL] = imx_clk_hw_mux_flags("apll_sel", base + 0x508, 1, 1, apll_sels, ARRAY_… in imx7ulp_clk_scg1_init()
100 …hws[IMX7ULP_CLK_SPLL_SEL] = imx_clk_hw_mux_flags("spll_sel", base + 0x608, 1, 1, spll_sels, ARRAY_… in imx7ulp_clk_scg1_init()
102 …hws[IMX7ULP_CLK_SPLL_BUS_CLK] = imx_clk_hw_divider_gate("spll_bus_clk", "spll_sel", CLK_SET_RATE_G… in imx7ulp_clk_scg1_init()
105 …hws[IMX7ULP_CLK_SYS_SEL] = imx_clk_hw_mux2("scs_sel", base + 0x14, 24, 4, scs_sels, ARRAY_SIZE(scs… in imx7ulp_clk_scg1_init()
106 …hws[IMX7ULP_CLK_HSRUN_SYS_SEL] = imx_clk_hw_mux2("hsrun_scs_sel", base + 0x1c, 24, 4, scs_sels, AR… in imx7ulp_clk_scg1_init()
107 …hws[IMX7ULP_CLK_NIC_SEL] = imx_clk_hw_mux2("nic_sel", base + 0x40, 28, 1, nic_sels, ARRAY_SIZE(nic… in imx7ulp_clk_scg1_init()
108 …hws[IMX7ULP_CLK_DDR_SEL] = imx_clk_hw_mux_flags("ddr_sel", base + 0x30, 24, 2, ddr_sels, ARRAY_SIZ… in imx7ulp_clk_scg1_init()
110 …hws[IMX7ULP_CLK_CORE_DIV] = imx_clk_hw_divider_flags("divcore", "scs_sel", base + 0x14, 16, 4, CL… in imx7ulp_clk_scg1_init()
111 …hws[IMX7ULP_CLK_CORE] = imx_clk_hw_cpu("core", "divcore", hws[IMX7ULP_CLK_CORE_DIV]->clk, hws[IMX… in imx7ulp_clk_scg1_init()
112 …hws[IMX7ULP_CLK_HSRUN_CORE_DIV] = imx_clk_hw_divider_flags("hsrun_divcore", "hsrun_scs_sel", base … in imx7ulp_clk_scg1_init()
113 …hws[IMX7ULP_CLK_HSRUN_CORE] = imx_clk_hw_cpu("hsrun_core", "hsrun_divcore", hws[IMX7ULP_CLK_HSRUN_… in imx7ulp_clk_scg1_init()
115 …hws[IMX7ULP_CLK_DDR_DIV] = imx_clk_hw_divider_gate("ddr_clk", "ddr_sel", CLK_SET_RATE_PARENT | CLK… in imx7ulp_clk_scg1_init()
118 …hws[IMX7ULP_CLK_NIC0_DIV] = imx_clk_hw_divider_flags("nic0_clk", "nic_sel", base + 0x40, 24, 4, … in imx7ulp_clk_scg1_init()
119 …hws[IMX7ULP_CLK_NIC1_DIV] = imx_clk_hw_divider_flags("nic1_clk", "nic0_clk", base + 0x40, 16, 4, … in imx7ulp_clk_scg1_init()
120 …hws[IMX7ULP_CLK_NIC1_BUS_DIV] = imx_clk_hw_divider_flags("nic1_bus_clk", "nic0_clk", base + 0x40, … in imx7ulp_clk_scg1_init()
122 hws[IMX7ULP_CLK_GPU_DIV] = imx_clk_hw_divider("gpu_clk", "nic0_clk", base + 0x40, 20, 4); in imx7ulp_clk_scg1_init()
124 …hws[IMX7ULP_CLK_SOSC_BUS_CLK] = imx_clk_hw_divider_gate("sosc_bus_clk", "sosc", 0, base + 0x104, 8… in imx7ulp_clk_scg1_init()
126 …hws[IMX7ULP_CLK_FIRC_BUS_CLK] = imx_clk_hw_divider_gate("firc_bus_clk", "firc", 0, base + 0x304, 8… in imx7ulp_clk_scg1_init()
129 imx_check_clk_hws(hws, clk_data->num); in imx7ulp_clk_scg1_init()
138 struct clk_hw **hws; in imx7ulp_clk_pcc2_init() local
141 clk_data = kzalloc(struct_size(clk_data, hws, IMX7ULP_CLK_PCC2_END), in imx7ulp_clk_pcc2_init()
147 hws = clk_data->hws; in imx7ulp_clk_pcc2_init()
153 hws[IMX7ULP_CLK_DMA1] = imx_clk_hw_gate("dma1", "nic1_clk", base + 0x20, 30); in imx7ulp_clk_pcc2_init()
154 hws[IMX7ULP_CLK_RGPIO2P1] = imx_clk_hw_gate("rgpio2p1", "nic1_bus_clk", base + 0x3c, 30); in imx7ulp_clk_pcc2_init()
155 hws[IMX7ULP_CLK_DMA_MUX1] = imx_clk_hw_gate("dma_mux1", "nic1_bus_clk", base + 0x84, 30); in imx7ulp_clk_pcc2_init()
156 hws[IMX7ULP_CLK_CAAM] = imx_clk_hw_gate("caam", "nic1_clk", base + 0x90, 30); in imx7ulp_clk_pcc2_init()
157 …hws[IMX7ULP_CLK_LPTPM4] = imx7ulp_clk_hw_composite("lptpm4", periph_bus_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc2_init()
158 …hws[IMX7ULP_CLK_LPTPM5] = imx7ulp_clk_hw_composite("lptpm5", periph_bus_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc2_init()
159 …hws[IMX7ULP_CLK_LPIT1] = imx7ulp_clk_hw_composite("lpit1", periph_bus_sels, ARRAY_SIZE(periph_b… in imx7ulp_clk_pcc2_init()
160 …hws[IMX7ULP_CLK_LPSPI2] = imx7ulp_clk_hw_composite("lpspi2", periph_bus_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc2_init()
161 …hws[IMX7ULP_CLK_LPSPI3] = imx7ulp_clk_hw_composite("lpspi3", periph_bus_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc2_init()
162 …hws[IMX7ULP_CLK_LPI2C4] = imx7ulp_clk_hw_composite("lpi2c4", periph_bus_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc2_init()
163 …hws[IMX7ULP_CLK_LPI2C5] = imx7ulp_clk_hw_composite("lpi2c5", periph_bus_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc2_init()
164 …hws[IMX7ULP_CLK_LPUART4] = imx7ulp_clk_hw_composite("lpuart4", periph_bus_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc2_init()
165 …hws[IMX7ULP_CLK_LPUART5] = imx7ulp_clk_hw_composite("lpuart5", periph_bus_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc2_init()
166 …hws[IMX7ULP_CLK_FLEXIO1] = imx7ulp_clk_hw_composite("flexio1", periph_bus_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc2_init()
167 …hws[IMX7ULP_CLK_USB0] = imx7ulp_clk_hw_composite("usb0", periph_plat_sels, ARRAY_SIZE(periph_p… in imx7ulp_clk_pcc2_init()
168 …hws[IMX7ULP_CLK_USB1] = imx7ulp_clk_hw_composite("usb1", periph_plat_sels, ARRAY_SIZE(periph_p… in imx7ulp_clk_pcc2_init()
169 hws[IMX7ULP_CLK_USB_PHY] = imx_clk_hw_gate("usb_phy", "nic1_bus_clk", base + 0xd4, 30); in imx7ulp_clk_pcc2_init()
170 …hws[IMX7ULP_CLK_USDHC0] = imx7ulp_clk_hw_composite("usdhc0", periph_plat_sels, ARRAY_SIZE(periph… in imx7ulp_clk_pcc2_init()
171 …hws[IMX7ULP_CLK_USDHC1] = imx7ulp_clk_hw_composite("usdhc1", periph_plat_sels, ARRAY_SIZE(periph… in imx7ulp_clk_pcc2_init()
172 …hws[IMX7ULP_CLK_WDG1] = imx7ulp_clk_hw_composite("wdg1", periph_bus_sels, ARRAY_SIZE(periph_bu… in imx7ulp_clk_pcc2_init()
173 …hws[IMX7ULP_CLK_WDG2] = imx7ulp_clk_hw_composite("wdg2", periph_bus_sels, ARRAY_SIZE(periph_bu… in imx7ulp_clk_pcc2_init()
175 imx_check_clk_hws(hws, clk_data->num); in imx7ulp_clk_pcc2_init()
186 struct clk_hw **hws; in imx7ulp_clk_pcc3_init() local
189 clk_data = kzalloc(struct_size(clk_data, hws, IMX7ULP_CLK_PCC3_END), in imx7ulp_clk_pcc3_init()
195 hws = clk_data->hws; in imx7ulp_clk_pcc3_init()
201 …hws[IMX7ULP_CLK_LPTPM6] = imx7ulp_clk_hw_composite("lptpm6", periph_bus_sels, ARRAY_SIZE(periph_b… in imx7ulp_clk_pcc3_init()
202 …hws[IMX7ULP_CLK_LPTPM7] = imx7ulp_clk_hw_composite("lptpm7", periph_bus_sels, ARRAY_SIZE(periph_b… in imx7ulp_clk_pcc3_init()
204 …hws[IMX7ULP_CLK_MMDC] = clk_hw_register_gate(NULL, "mmdc", "nic1_clk", CLK_SET_RATE_PARENT | CLK_… in imx7ulp_clk_pcc3_init()
206 …hws[IMX7ULP_CLK_LPI2C6] = imx7ulp_clk_hw_composite("lpi2c6", periph_bus_sels, ARRAY_SIZE(periph_b… in imx7ulp_clk_pcc3_init()
207 …hws[IMX7ULP_CLK_LPI2C7] = imx7ulp_clk_hw_composite("lpi2c7", periph_bus_sels, ARRAY_SIZE(periph_b… in imx7ulp_clk_pcc3_init()
208 …hws[IMX7ULP_CLK_LPUART6] = imx7ulp_clk_hw_composite("lpuart6", periph_bus_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc3_init()
209 …hws[IMX7ULP_CLK_LPUART7] = imx7ulp_clk_hw_composite("lpuart7", periph_bus_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc3_init()
210 …hws[IMX7ULP_CLK_DSI] = imx7ulp_clk_hw_composite("dsi", periph_bus_sels, ARRAY_SIZE(periph_bus… in imx7ulp_clk_pcc3_init()
211 …hws[IMX7ULP_CLK_LCDIF] = imx7ulp_clk_hw_composite("lcdif", periph_plat_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc3_init()
213 hws[IMX7ULP_CLK_VIU] = imx_clk_hw_gate("viu", "nic1_clk", base + 0xa0, 30); in imx7ulp_clk_pcc3_init()
214 hws[IMX7ULP_CLK_PCTLC] = imx_clk_hw_gate("pctlc", "nic1_bus_clk", base + 0xb8, 30); in imx7ulp_clk_pcc3_init()
215 hws[IMX7ULP_CLK_PCTLD] = imx_clk_hw_gate("pctld", "nic1_bus_clk", base + 0xbc, 30); in imx7ulp_clk_pcc3_init()
216 hws[IMX7ULP_CLK_PCTLE] = imx_clk_hw_gate("pctle", "nic1_bus_clk", base + 0xc0, 30); in imx7ulp_clk_pcc3_init()
217 hws[IMX7ULP_CLK_PCTLF] = imx_clk_hw_gate("pctlf", "nic1_bus_clk", base + 0xc4, 30); in imx7ulp_clk_pcc3_init()
219 …hws[IMX7ULP_CLK_GPU3D] = imx7ulp_clk_hw_composite("gpu3d", periph_plat_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc3_init()
220 …hws[IMX7ULP_CLK_GPU2D] = imx7ulp_clk_hw_composite("gpu2d", periph_plat_sels, ARRAY_SIZE(periph_… in imx7ulp_clk_pcc3_init()
222 imx_check_clk_hws(hws, clk_data->num); in imx7ulp_clk_pcc3_init()
233 struct clk_hw **hws; in imx7ulp_clk_smc1_init() local
236 clk_data = kzalloc(struct_size(clk_data, hws, IMX7ULP_CLK_SMC1_END), in imx7ulp_clk_smc1_init()
242 hws = clk_data->hws; in imx7ulp_clk_smc1_init()
248 …hws[IMX7ULP_CLK_ARM] = imx_clk_hw_mux_flags("arm", base + 0x10, 8, 2, arm_sels, ARRAY_SIZE(arm_sel… in imx7ulp_clk_smc1_init()
250 imx_check_clk_hws(hws, clk_data->num); in imx7ulp_clk_smc1_init()