28 	rate = (unsigned long long int)parent_rate * fix->mult;  in clk_factor_recalc_rate()
41 		best_parent = (rate / fix->mult) * fix->div;  in clk_factor_round_rate()
45 	return (*prate / fix->div) * fix->mult;  in clk_factor_round_rate()
83 		unsigned long flags, unsigned int mult, unsigned int div,  in __clk_hw_register_fixed_factor()  argument
105 	fix->mult = mult;  in __clk_hw_register_fixed_factor()
152 		unsigned int mult, unsigned int div)  in devm_clk_hw_register_fixed_factor_index()  argument
155 					      flags, mult, div, true);  in devm_clk_hw_register_fixed_factor_index()
174 		unsigned long flags, unsigned int mult, unsigned int div)  in devm_clk_hw_register_fixed_factor_parent_hw()  argument
177 					      -1, flags, mult, div, true);  in devm_clk_hw_register_fixed_factor_parent_hw()
183 		unsigned long flags, unsigned int mult, unsigned int div)  in clk_hw_register_fixed_factor_parent_hw()  argument
186 					      parent_hw, -1, flags, mult, div,  in clk_hw_register_fixed_factor_parent_hw()
193 		unsigned int mult, unsigned int div)  in clk_hw_register_fixed_factor()  argument
196 					      flags, mult, div, false);  in clk_hw_register_fixed_factor()
202 		unsigned int mult, unsigned int div)  in clk_register_fixed_factor()  argument
206 	hw = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult,  in clk_register_fixed_factor()
240 		unsigned int mult, unsigned int div)  in devm_clk_hw_register_fixed_factor()  argument
243 			flags, mult, div, true);  in devm_clk_hw_register_fixed_factor()
252 	u32 div, mult;  in _of_fixed_factor_clk_setup()  local
261 	if (of_property_read_u32(node, "clock-mult", &mult)) {  in _of_fixed_factor_clk_setup()
270 					    0, mult, div, false);  in _of_fixed_factor_clk_setup()