Lines Matching refs:d

78 	struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);  in regmap_irq_lock()  local
80 mutex_lock(&d->lock); in regmap_irq_lock()
85 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); in regmap_irq_sync_unlock() local
86 struct regmap *map = d->map; in regmap_irq_sync_unlock()
91 if (d->chip->runtime_pm) { in regmap_irq_sync_unlock()
98 if (d->clear_status) { in regmap_irq_sync_unlock()
99 for (i = 0; i < d->chip->num_regs; i++) { in regmap_irq_sync_unlock()
100 reg = d->get_irq_reg(d, d->chip->status_base, i); in regmap_irq_sync_unlock()
104 dev_err(d->map->dev, in regmap_irq_sync_unlock()
108 d->clear_status = false; in regmap_irq_sync_unlock()
116 for (i = 0; i < d->chip->num_regs; i++) { in regmap_irq_sync_unlock()
117 if (d->mask_base) { in regmap_irq_sync_unlock()
118 reg = d->get_irq_reg(d, d->mask_base, i); in regmap_irq_sync_unlock()
119 ret = regmap_update_bits(d->map, reg, in regmap_irq_sync_unlock()
120 d->mask_buf_def[i], d->mask_buf[i]); in regmap_irq_sync_unlock()
122 dev_err(d->map->dev, "Failed to sync masks in %x\n", in regmap_irq_sync_unlock()
126 if (d->unmask_base) { in regmap_irq_sync_unlock()
127 reg = d->get_irq_reg(d, d->unmask_base, i); in regmap_irq_sync_unlock()
128 ret = regmap_update_bits(d->map, reg, in regmap_irq_sync_unlock()
129 d->mask_buf_def[i], ~d->mask_buf[i]); in regmap_irq_sync_unlock()
131 dev_err(d->map->dev, "Failed to sync masks in %x\n", in regmap_irq_sync_unlock()
135 reg = d->get_irq_reg(d, d->chip->wake_base, i); in regmap_irq_sync_unlock()
136 if (d->wake_buf) { in regmap_irq_sync_unlock()
137 if (d->chip->wake_invert) in regmap_irq_sync_unlock()
138 ret = regmap_update_bits(d->map, reg, in regmap_irq_sync_unlock()
139 d->mask_buf_def[i], in regmap_irq_sync_unlock()
140 ~d->wake_buf[i]); in regmap_irq_sync_unlock()
142 ret = regmap_update_bits(d->map, reg, in regmap_irq_sync_unlock()
143 d->mask_buf_def[i], in regmap_irq_sync_unlock()
144 d->wake_buf[i]); in regmap_irq_sync_unlock()
146 dev_err(d->map->dev, in regmap_irq_sync_unlock()
151 if (!d->chip->init_ack_masked) in regmap_irq_sync_unlock()
158 if (d->mask_buf[i] && (d->chip->ack_base || d->chip->use_ack)) { in regmap_irq_sync_unlock()
159 reg = d->get_irq_reg(d, d->chip->ack_base, i); in regmap_irq_sync_unlock()
162 if (d->chip->ack_invert) in regmap_irq_sync_unlock()
163 ret = regmap_write(map, reg, ~d->mask_buf[i]); in regmap_irq_sync_unlock()
165 ret = regmap_write(map, reg, d->mask_buf[i]); in regmap_irq_sync_unlock()
166 if (d->chip->clear_ack) { in regmap_irq_sync_unlock()
167 if (d->chip->ack_invert && !ret) in regmap_irq_sync_unlock()
173 dev_err(d->map->dev, "Failed to ack 0x%x: %d\n", in regmap_irq_sync_unlock()
179 if (!d->chip->type_in_mask) { in regmap_irq_sync_unlock()
180 for (i = 0; i < d->chip->num_type_reg; i++) { in regmap_irq_sync_unlock()
181 if (!d->type_buf_def[i]) in regmap_irq_sync_unlock()
183 reg = d->get_irq_reg(d, d->chip->type_base, i); in regmap_irq_sync_unlock()
184 if (d->chip->type_invert) in regmap_irq_sync_unlock()
185 ret = regmap_update_bits(d->map, reg, in regmap_irq_sync_unlock()
186 d->type_buf_def[i], ~d->type_buf[i]); in regmap_irq_sync_unlock()
188 ret = regmap_update_bits(d->map, reg, in regmap_irq_sync_unlock()
189 d->type_buf_def[i], d->type_buf[i]); in regmap_irq_sync_unlock()
191 dev_err(d->map->dev, "Failed to sync type in %x\n", in regmap_irq_sync_unlock()
196 if (d->chip->num_virt_regs) { in regmap_irq_sync_unlock()
197 for (i = 0; i < d->chip->num_virt_regs; i++) { in regmap_irq_sync_unlock()
198 for (j = 0; j < d->chip->num_regs; j++) { in regmap_irq_sync_unlock()
199 reg = d->get_irq_reg(d, d->chip->virt_reg_base[i], in regmap_irq_sync_unlock()
201 ret = regmap_write(map, reg, d->virt_buf[i][j]); in regmap_irq_sync_unlock()
203 dev_err(d->map->dev, in regmap_irq_sync_unlock()
210 for (i = 0; i < d->chip->num_config_bases; i++) { in regmap_irq_sync_unlock()
211 for (j = 0; j < d->chip->num_config_regs; j++) { in regmap_irq_sync_unlock()
212 reg = d->get_irq_reg(d, d->chip->config_base[i], j); in regmap_irq_sync_unlock()
213 ret = regmap_write(map, reg, d->config_buf[i][j]); in regmap_irq_sync_unlock()
215 dev_err(d->map->dev, in regmap_irq_sync_unlock()
221 if (d->chip->runtime_pm) in regmap_irq_sync_unlock()
225 if (d->wake_count < 0) in regmap_irq_sync_unlock()
226 for (i = d->wake_count; i < 0; i++) in regmap_irq_sync_unlock()
227 irq_set_irq_wake(d->irq, 0); in regmap_irq_sync_unlock()
228 else if (d->wake_count > 0) in regmap_irq_sync_unlock()
229 for (i = 0; i < d->wake_count; i++) in regmap_irq_sync_unlock()
230 irq_set_irq_wake(d->irq, 1); in regmap_irq_sync_unlock()
232 d->wake_count = 0; in regmap_irq_sync_unlock()
234 mutex_unlock(&d->lock); in regmap_irq_sync_unlock()
239 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); in regmap_irq_enable() local
240 struct regmap *map = d->map; in regmap_irq_enable()
241 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_enable()
255 if (d->chip->type_in_mask && irq_data->type.types_supported) in regmap_irq_enable()
256 mask = d->type_buf[reg] & irq_data->mask; in regmap_irq_enable()
260 if (d->chip->clear_on_unmask) in regmap_irq_enable()
261 d->clear_status = true; in regmap_irq_enable()
263 d->mask_buf[reg] &= ~mask; in regmap_irq_enable()
268 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); in regmap_irq_disable() local
269 struct regmap *map = d->map; in regmap_irq_disable()
270 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_disable()
272 d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask; in regmap_irq_disable()
277 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); in regmap_irq_set_type() local
278 struct regmap *map = d->map; in regmap_irq_set_type()
279 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_set_type()
289 d->type_buf[reg] &= ~t->type_reg_mask; in regmap_irq_set_type()
291 d->type_buf[reg] &= ~(t->type_falling_val | in regmap_irq_set_type()
297 d->type_buf[reg] |= t->type_falling_val; in regmap_irq_set_type()
301 d->type_buf[reg] |= t->type_rising_val; in regmap_irq_set_type()
305 d->type_buf[reg] |= (t->type_falling_val | in regmap_irq_set_type()
310 d->type_buf[reg] |= t->type_level_high_val; in regmap_irq_set_type()
314 d->type_buf[reg] |= t->type_level_low_val; in regmap_irq_set_type()
320 if (d->chip->set_type_virt) { in regmap_irq_set_type()
321 ret = d->chip->set_type_virt(d->virt_buf, type, data->hwirq, in regmap_irq_set_type()
327 if (d->chip->set_type_config) { in regmap_irq_set_type()
328 ret = d->chip->set_type_config(d->config_buf, type, in regmap_irq_set_type()
339 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); in regmap_irq_set_wake() local
340 struct regmap *map = d->map; in regmap_irq_set_wake()
341 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_set_wake()
344 if (d->wake_buf) in regmap_irq_set_wake()
345 d->wake_buf[irq_data->reg_offset / map->reg_stride] in regmap_irq_set_wake()
347 d->wake_count++; in regmap_irq_set_wake()
349 if (d->wake_buf) in regmap_irq_set_wake()
350 d->wake_buf[irq_data->reg_offset / map->reg_stride] in regmap_irq_set_wake()
352 d->wake_count--; in regmap_irq_set_wake()
405 static irqreturn_t regmap_irq_thread(int irq, void *d) in regmap_irq_thread() argument
407 struct regmap_irq_chip_data *data = d; in regmap_irq_thread()
721 struct regmap_irq_chip_data *d; in regmap_add_irq_chip_fwnode() local
765 d = kzalloc(sizeof(*d), GFP_KERNEL); in regmap_add_irq_chip_fwnode()
766 if (!d) in regmap_add_irq_chip_fwnode()
770 d->main_status_buf = kcalloc(chip->num_main_regs, in regmap_add_irq_chip_fwnode()
771 sizeof(*d->main_status_buf), in regmap_add_irq_chip_fwnode()
774 if (!d->main_status_buf) in regmap_add_irq_chip_fwnode()
778 d->status_buf = kcalloc(chip->num_regs, sizeof(*d->status_buf), in regmap_add_irq_chip_fwnode()
780 if (!d->status_buf) in regmap_add_irq_chip_fwnode()
783 d->mask_buf = kcalloc(chip->num_regs, sizeof(*d->mask_buf), in regmap_add_irq_chip_fwnode()
785 if (!d->mask_buf) in regmap_add_irq_chip_fwnode()
788 d->mask_buf_def = kcalloc(chip->num_regs, sizeof(*d->mask_buf_def), in regmap_add_irq_chip_fwnode()
790 if (!d->mask_buf_def) in regmap_add_irq_chip_fwnode()
794 d->wake_buf = kcalloc(chip->num_regs, sizeof(*d->wake_buf), in regmap_add_irq_chip_fwnode()
796 if (!d->wake_buf) in regmap_add_irq_chip_fwnode()
808 d->type_buf_def = kcalloc(num_regs, in regmap_add_irq_chip_fwnode()
809 sizeof(*d->type_buf_def), GFP_KERNEL); in regmap_add_irq_chip_fwnode()
810 if (!d->type_buf_def) in regmap_add_irq_chip_fwnode()
813 d->type_buf = kcalloc(num_regs, sizeof(*d->type_buf), in regmap_add_irq_chip_fwnode()
815 if (!d->type_buf) in regmap_add_irq_chip_fwnode()
823 d->virt_buf = kcalloc(chip->num_virt_regs, sizeof(*d->virt_buf), in regmap_add_irq_chip_fwnode()
825 if (!d->virt_buf) in regmap_add_irq_chip_fwnode()
829 d->virt_buf[i] = kcalloc(chip->num_regs, in regmap_add_irq_chip_fwnode()
830 sizeof(**d->virt_buf), in regmap_add_irq_chip_fwnode()
832 if (!d->virt_buf[i]) in regmap_add_irq_chip_fwnode()
841 d->config_buf = kcalloc(chip->num_config_bases, in regmap_add_irq_chip_fwnode()
842 sizeof(*d->config_buf), GFP_KERNEL); in regmap_add_irq_chip_fwnode()
843 if (!d->config_buf) in regmap_add_irq_chip_fwnode()
847 d->config_buf[i] = kcalloc(chip->num_config_regs, in regmap_add_irq_chip_fwnode()
848 sizeof(**d->config_buf), in regmap_add_irq_chip_fwnode()
850 if (!d->config_buf[i]) in regmap_add_irq_chip_fwnode()
855 d->irq_chip = regmap_irq_chip; in regmap_add_irq_chip_fwnode()
856 d->irq_chip.name = chip->name; in regmap_add_irq_chip_fwnode()
857 d->irq = irq; in regmap_add_irq_chip_fwnode()
858 d->map = map; in regmap_add_irq_chip_fwnode()
859 d->chip = chip; in regmap_add_irq_chip_fwnode()
860 d->irq_base = irq_base; in regmap_add_irq_chip_fwnode()
881 d->mask_base = chip->unmask_base; in regmap_add_irq_chip_fwnode()
882 d->unmask_base = chip->mask_base; in regmap_add_irq_chip_fwnode()
891 d->mask_base = chip->unmask_base; in regmap_add_irq_chip_fwnode()
892 d->unmask_base = chip->mask_base; in regmap_add_irq_chip_fwnode()
894 d->mask_base = chip->mask_base; in regmap_add_irq_chip_fwnode()
895 d->unmask_base = chip->unmask_base; in regmap_add_irq_chip_fwnode()
899 d->irq_reg_stride = chip->irq_reg_stride; in regmap_add_irq_chip_fwnode()
901 d->irq_reg_stride = 1; in regmap_add_irq_chip_fwnode()
904 d->get_irq_reg = chip->get_irq_reg; in regmap_add_irq_chip_fwnode()
906 d->get_irq_reg = regmap_irq_get_irq_reg_linear; in regmap_add_irq_chip_fwnode()
908 if (regmap_irq_can_bulk_read_status(d)) { in regmap_add_irq_chip_fwnode()
909 d->status_reg_buf = kmalloc_array(chip->num_regs, in regmap_add_irq_chip_fwnode()
912 if (!d->status_reg_buf) in regmap_add_irq_chip_fwnode()
916 mutex_init(&d->lock); in regmap_add_irq_chip_fwnode()
919 d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride] in regmap_add_irq_chip_fwnode()
924 d->mask_buf[i] = d->mask_buf_def[i]; in regmap_add_irq_chip_fwnode()
926 if (d->mask_base) { in regmap_add_irq_chip_fwnode()
927 reg = d->get_irq_reg(d, d->mask_base, i); in regmap_add_irq_chip_fwnode()
928 ret = regmap_update_bits(d->map, reg, in regmap_add_irq_chip_fwnode()
929 d->mask_buf_def[i], d->mask_buf[i]); in regmap_add_irq_chip_fwnode()
937 if (d->unmask_base) { in regmap_add_irq_chip_fwnode()
938 reg = d->get_irq_reg(d, d->unmask_base, i); in regmap_add_irq_chip_fwnode()
939 ret = regmap_update_bits(d->map, reg, in regmap_add_irq_chip_fwnode()
940 d->mask_buf_def[i], ~d->mask_buf[i]); in regmap_add_irq_chip_fwnode()
952 reg = d->get_irq_reg(d, d->chip->status_base, i); in regmap_add_irq_chip_fwnode()
953 ret = regmap_read(map, reg, &d->status_buf[i]); in regmap_add_irq_chip_fwnode()
961 d->status_buf[i] = ~d->status_buf[i]; in regmap_add_irq_chip_fwnode()
963 if (d->status_buf[i] && (chip->ack_base || chip->use_ack)) { in regmap_add_irq_chip_fwnode()
964 reg = d->get_irq_reg(d, d->chip->ack_base, i); in regmap_add_irq_chip_fwnode()
967 ~(d->status_buf[i] & d->mask_buf[i])); in regmap_add_irq_chip_fwnode()
970 d->status_buf[i] & d->mask_buf[i]); in regmap_add_irq_chip_fwnode()
986 if (d->wake_buf) { in regmap_add_irq_chip_fwnode()
988 d->wake_buf[i] = d->mask_buf_def[i]; in regmap_add_irq_chip_fwnode()
989 reg = d->get_irq_reg(d, d->chip->wake_base, i); in regmap_add_irq_chip_fwnode()
992 ret = regmap_update_bits(d->map, reg, in regmap_add_irq_chip_fwnode()
993 d->mask_buf_def[i], in regmap_add_irq_chip_fwnode()
996 ret = regmap_update_bits(d->map, reg, in regmap_add_irq_chip_fwnode()
997 d->mask_buf_def[i], in regmap_add_irq_chip_fwnode()
998 d->wake_buf[i]); in regmap_add_irq_chip_fwnode()
1009 reg = d->get_irq_reg(d, d->chip->type_base, i); in regmap_add_irq_chip_fwnode()
1011 ret = regmap_read(map, reg, &d->type_buf_def[i]); in regmap_add_irq_chip_fwnode()
1013 if (d->chip->type_invert) in regmap_add_irq_chip_fwnode()
1014 d->type_buf_def[i] = ~d->type_buf_def[i]; in regmap_add_irq_chip_fwnode()
1025 d->domain = irq_domain_create_legacy(fwnode, chip->num_irqs, in regmap_add_irq_chip_fwnode()
1027 &regmap_domain_ops, d); in regmap_add_irq_chip_fwnode()
1029 d->domain = irq_domain_create_linear(fwnode, chip->num_irqs, in regmap_add_irq_chip_fwnode()
1030 &regmap_domain_ops, d); in regmap_add_irq_chip_fwnode()
1031 if (!d->domain) { in regmap_add_irq_chip_fwnode()
1039 chip->name, d); in regmap_add_irq_chip_fwnode()
1046 *data = d; in regmap_add_irq_chip_fwnode()
1053 kfree(d->type_buf); in regmap_add_irq_chip_fwnode()
1054 kfree(d->type_buf_def); in regmap_add_irq_chip_fwnode()
1055 kfree(d->wake_buf); in regmap_add_irq_chip_fwnode()
1056 kfree(d->mask_buf_def); in regmap_add_irq_chip_fwnode()
1057 kfree(d->mask_buf); in regmap_add_irq_chip_fwnode()
1058 kfree(d->status_buf); in regmap_add_irq_chip_fwnode()
1059 kfree(d->status_reg_buf); in regmap_add_irq_chip_fwnode()
1060 if (d->virt_buf) { in regmap_add_irq_chip_fwnode()
1062 kfree(d->virt_buf[i]); in regmap_add_irq_chip_fwnode()
1063 kfree(d->virt_buf); in regmap_add_irq_chip_fwnode()
1065 if (d->config_buf) { in regmap_add_irq_chip_fwnode()
1067 kfree(d->config_buf[i]); in regmap_add_irq_chip_fwnode()
1068 kfree(d->config_buf); in regmap_add_irq_chip_fwnode()
1070 kfree(d); in regmap_add_irq_chip_fwnode()
1107 void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d) in regmap_del_irq_chip() argument
1112 if (!d) in regmap_del_irq_chip()
1115 free_irq(irq, d); in regmap_del_irq_chip()
1118 for (hwirq = 0; hwirq < d->chip->num_irqs; hwirq++) { in regmap_del_irq_chip()
1120 if (!d->chip->irqs[hwirq].mask) in regmap_del_irq_chip()
1127 virq = irq_find_mapping(d->domain, hwirq); in regmap_del_irq_chip()
1132 irq_domain_remove(d->domain); in regmap_del_irq_chip()
1133 kfree(d->type_buf); in regmap_del_irq_chip()
1134 kfree(d->type_buf_def); in regmap_del_irq_chip()
1135 kfree(d->wake_buf); in regmap_del_irq_chip()
1136 kfree(d->mask_buf_def); in regmap_del_irq_chip()
1137 kfree(d->mask_buf); in regmap_del_irq_chip()
1138 kfree(d->status_reg_buf); in regmap_del_irq_chip()
1139 kfree(d->status_buf); in regmap_del_irq_chip()
1140 if (d->config_buf) { in regmap_del_irq_chip()
1141 for (i = 0; i < d->chip->num_config_bases; i++) in regmap_del_irq_chip()
1142 kfree(d->config_buf[i]); in regmap_del_irq_chip()
1143 kfree(d->config_buf); in regmap_del_irq_chip()
1145 kfree(d); in regmap_del_irq_chip()
1151 struct regmap_irq_chip_data *d = *(struct regmap_irq_chip_data **)res; in devm_regmap_irq_chip_release() local
1153 regmap_del_irq_chip(d->irq, d); in devm_regmap_irq_chip_release()
1192 struct regmap_irq_chip_data **ptr, *d; in devm_regmap_add_irq_chip_fwnode() local
1201 chip, &d); in devm_regmap_add_irq_chip_fwnode()
1207 *ptr = d; in devm_regmap_add_irq_chip_fwnode()
1209 *data = d; in devm_regmap_add_irq_chip_fwnode()