68 #define EMIT2(b1, b2)		EMIT((b1) + ((b2) << 8), 2)  argument
69 #define EMIT3(b1, b2, b3)	EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)  argument
70 #define EMIT4(b1, b2, b3, b4)   \  argument
71 	EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4)
75 #define EMIT2_off32(b1, b2, off) \  argument
76 	do { EMIT2(b1, b2); EMIT(off, 4); } while (0)
77 #define EMIT3_off32(b1, b2, b3, off) \  argument
78 	do { EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
79 #define EMIT4_off32(b1, b2, b3, b4, off) \  argument
80 	do { EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0)
488 	u8 b2;  in emit_ia32_shift_r()  local
503 		b2 = 0xE0; break;  in emit_ia32_shift_r()
505 		b2 = 0xE8; break;  in emit_ia32_shift_r()
507 		b2 = 0xF8; break;  in emit_ia32_shift_r()
511 	EMIT2(0xD3, add_1reg(b2, dreg));  in emit_ia32_shift_r()